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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PC87591L датащи(PDF) 195 Page - National Semiconductor (TI) |
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PC87591L датащи(HTML) 195 Page - National Semiconductor (TI) |
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195 / 437 page  Embedded Controller Modules (Continued) Revision 1.07 195 www.national.com Output Settling Time The DAC output settling time depends on the external load characteristics and the required accuracy. Figure 68 shows the equivalent circuit used for evaluating DAC behavior. Each DAC output has a typical output impedance of 3 K Ω. For example, if the total load is a 50 pF capacitor only, the output settles to 1/2 LSB within 1 µs. The total load capacitance is comprises the analog output capacitance (CAO) and the external load capacitance (CL). Filtering Noise on Output Signals Output signals may have unwanted noise caused by nearby digital circuits. When using slow changing signals in a noisy environment, a low-pass filter (LPF) may be added externally. This may also be required in applications where the DAC out- puts control sensitive circuits like audio amplifiers. This can be implemented as a simple RC circuit. The cutoff frequency of this LPF should be above the required signal frequency. Figure 68. DAC Output Equivalent Circuit CL RO CAO RL Application DAC Output Equivalent Circuit Load Circuit VOUT |
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