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PC87591L датащи(PDF) 194 Page - National Semiconductor (TI) |
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PC87591L датащи(HTML) 194 Page - National Semiconductor (TI) |
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194 / 437 page ![]() Embedded Controller Modules (Continued) www.national.com 194 Revision 1.07 DAC Data Channel 0-3 Registers (DACDAT0-3) These registers hold the data to be loaded into Channels 0-3 of the DAC. These registers are not affected by reset or disable of the respective channel. Location: Channel 0 - 00 FF4216 Channel 1 - 00 FF4416 Channel 2 - 00 FF4616 Channel 3 - 00 FF4816 Type: R/W 4.12.6 Usage Hints Power Consumption When a channel is enabled and no load is connected, the DAC current consumption depends on the value set in DACDAT register. Minimal current is consumed when the data is 0016; maximum current is consumed when the data is 5516. DAC Output Protection To maintain the high performance of the analog circuits, the DAn (n=0 to 3) pins are not back-drive protected. Therefore, the voltage applied to these pins must be within the AGND to AVCC range; otherwise the device may be damaged. External circuits should not drive currents into these pins when the PC87591x is not powered up, because this may cause the internal power-up reset circuit to fail. Output Voltage Accuracy Besides the intrinsic accuracy of the D/A channels, the output voltage accuracy directly depends on the accuracy of the AVCC power supply, which serves as reference voltage. In order to improve the accuracy of the output voltage, the actual AVCC value, measured by the ADC module (see Section 4.11 on page 170), should be used when computing the value of DACDATA7-0 in DACDATn registers (see Section 4.12.3 on page 190). The external load on DA0-3 pins may also affect the final output voltage of the DAC. Since the output resistance of these pins is typically 3 K Ω, use high-impedance loads; if high accuracy or high output currents are required, use external analog drivers. For the worst case calculation, if the output resistance is 4 K Ω (maximum limit), the external load (R L) must not be lower than 2 M Ω (see Figure 68). In this case, the error caused by the load is lower than 1/2 LSB. To work with loads of 3 K Ω (1 mA at 3V) with an error lower than 1/2 LSB, the output resistance of the external driver should be lower than: ROEXT <3 KΩ /(2*256) = 5.8 Ω Bit 76543210 Name DAC DATAi Bit Description 7-0 DAC Data. 8-bit unsigned binary value used for the D/A operation. |
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