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LP8754 датащи(PDF) 7 Page - Texas Instruments

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номер детали LP8754
подробное описание детали  LP8754 Multi-Phase Six-Core Step-Down Converter
PDF  53 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

LP8754 датащи(HTML) 7 Page - Texas Instruments

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LP8754
www.ti.com
SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014
General Electrical Characteristics
(1)(2) (continued)
Limits apply over the full ambient temperature range -40°C
≤ TA ≤ 85°C, VVDDA5V = VVINBXX = 3.7 V, VVIOSYS = VNRST = 1.8 V,
VOUT = 1.1 V, (unless otherwise noted).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LOGIC AND CONTROL INPUTS SCLSR, SDASR, NSLP, NRST
VIL
Input low level
VNRST = 1.8 V
0.3 x VNRST
VIH
Input high level
VNRST = 1.8 V
0.7 x VNRST
V
Hysteresis of Schmitt trigger
Vhys
0.1 x VNRST
inputs (SCLSR, SDASR)
Capacitance of SCLSR and
Ci
4
pF
SDASR pins
RIN
Input resistance
NRST pulldown resistor to GND
1200
k
VIL_NRST
Input low level NRST
0.54
V
VIH_NRST
Input high level NRST
1.3
LOGIC AND CONTROL OUTPUTS
Voltage on INT pin, ISINK = 3 mA,
0.4
VNRST = VVIOSYS = 1.8 V
VOL
Output low level
V
Voltage on SDASYS, SDASR, ISINK = 3
mA,
0.36
VNRST = VVIOSYS = 1.8 V
External pull-up resistor for
RP
To I/O Supply
10
k
INT
ALL LOGIC AND CONTROL INPUTS
All Logic Inputs over pin voltage range.
Note that NRST pin does have an 1.2-M
Ω
ILEAK
Input current
internal pulldown resistor and current
−1
1
µA
through this resistor is not included into
ILEAK rating. TA = 25°C
6.6 6-Phase Buck Electrical Characteristics
Limits apply over the full ambient temperature range -40°C
≤ TA ≤ 85°C, VVDDA5V = VVINBXX = 3.7 V, VVIOSYS = VNRST = 1.8 V,
VOUT = 1.1 V, (unless otherwise noted).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VFB
Differential feedback voltage
PWM Mode, VOUTSET = 0.6 V to 1.67 V,
max
(1)
IOUT ≤ 10 A
(2)
min (VOUTSET -
(VOUTSET +
VFB0+/B0 - VFB0-/B1
2.5%, VOUTSET
VOUTSET
2.5%,
- 25 mV)
VOUTSET +
25 mV)
PFM Mode, VOUTSET = 0.6 V to 1.67 V,
max
IOUT ≤ 375 mA
min (VOUTSET -
(VOUTSET +
2.5%, VOUTSET
VOUTSET
2.5%,
V
- 25 mV)
VOUTSET +
25 mV)
Low-Power PFM Mode, VOUTSET = 0.6 V
max
to 1.67 V,
min (VOUTSET -
(VOUTSET +
IOUT ≤ 30 mA
3%, VOUTSET -
VOUTSET
3%,
30 mV)
VOUTSET +
30 mV)
(1)
Due to the nature of the converter operating in PFM mode/Low-Power Mode, the Feedback Voltage accuracy specification is for the
lower point of the ripple. Thus the converter will position the average output voltage typically slightly above the nominal PWM-mode
output voltage.
(2)
The power switches in the LP8754 are designed to operate continuously with currents up to the switch current limit thresholds. However,
when continuously operating at high current levels there will be significant heat generated within the IC and thus sustained total DC
current which the device can support is typically limited by thermal constraints. Thermal issues will become extremely important when
designing PCB and the thermal environment of the LP8754. PCB with high thermal efficiency is required to ensure the junction
temperature is kept below 125°C. Completing thermal analyses in early stages of the product design process is highly recommended to
predict thermal performance at board level. Under high current load conditions the serial bus master device must monitor the
temperature of the converter using the Thermal warning feature, see Protection Features Characteristics. If the 2nd thermal warning is
triggered at 120°C, the application must quickly decrease the load current to keep the converter within its recommended operating
temperature.
Copyright © 2014, Texas Instruments Incorporated
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