THS1041

SLAS289C − OCTOBER 2001 − REVISED OCTOBER 2004

22

www.ti.com

PRINCIPLES OF OPERATION

onboard reference generator configuration (continued)

_

+

VBG

ADC

References

Buffer A2

MODE =

REFSENSE

AGND

VREF = External

AVDD

_

+

AVDD

2

or AVDD

Figure 33. Drive VREF Mode

operating configuration examples

Figure 34 shows a configuration using the internal ADC references for digitizing a single-ended signal with span

provides the midscale 1-V bias for the AIN− input. Using the clamp to drive AIN− rather than connecting AIN−

directly to VREF helps to prevent kickback from the AIN− pin corrupting VREF. AIN− can be connected to VREF,

provided that VREF is well-decoupled to analog ground. Internal PGA gain setting is 1.

AIN+

AIN−

VREF = 1 V

REFB

MODE

REFSENSE

AVDD/2

2 V

0 V

1 V

CLAMPOUT

REFT

CLAMPIN

CLAMP

AVDD

20

Ω

20

Ω

10

µF

0.1

µF

0.1

µF

10

µF 0.1 µF

20 pF

20 pF

1

µF

Figure 34. Operating Configuration: 2-V Single-Ended Input, Internal ADC References