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TUSB5052 датащи(PDF) 21 Page - Texas Instruments

номер детали TUSB5052
подробное описание детали  USB TO 2-SERIAL PORT CONTROLLER WITH CONFIGURABLE OPTIONAL HUB
PDF  82 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

TUSB5052 датащи(HTML) 21 Page - Texas Instruments

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4−1
4 MCU Memory Map (Internal Operation)
Figure 4−1 illustrates the MCU memory map under boot and normal operation. Note that the internal 256 bytes of
RAM are not shown since they are assumed to be in the standard 8052 location (0000 to 00FF). The shaded areas
represent the internal ROM/RAM.
When SDW bit = 0 (boot mode): The 6K ROM is mapped to address (0x0000−0x17FF) and is duplicated in location
(0x8000−0x97FF) in code space. The internal 16K RAM is mapped to address range (0x0000−0x3FFF) in data
space. Buffers, memory-map registers (MMR) and I/O are mapped to address range (0xF800−0xFFFF) in data
space.
When SDW bit = 1 (normal mode): The 6K ROM is mapped to (0x8000−0x97FF) in code space. The internal 16K
RAM is mapped to address range (0x0000−0x3FFF) in code space. Buffers, MMR and I/O are mapped to address
range (0xF800−0xFFFF) in data space.
Boot Mode (SDW = 0)
Normal Mode (SDW = 1)
CODE
XDATA
CODE
XDATA
0000
(16K)
16K
6K Boot ROM
Code RAM
17FF
Read/Write
Read Only
3FFF
8000
6K Boot ROM
6K Boot ROM
97FF
F800
2K
2K
Data
Data
FF7F
FF80
MMR
MMR
FFFF
MMR
MMR
Figure 4−1. MCU Memory Map



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