AD9956SLASHPCB datasheet(5/32 Pages) AD

5 / 32 page

AD9956

Rev. 0 | Page 5 of 32

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LOGIC INPUTS (SDI/O, I/O_RESET, RESET,

I/O_UPDATE, PS0 to PS2, SYNC_IN)

VIH, Input High Voltage

2.0

VIL, Input Low Voltage

0.8

IINH, IINL Input Current

±1

±5

µA

CIN, Maximum Input Capacitance

LOGIC OUTPUTS (SDO, SYNC_OUT, PLL_LOCK)6

VOH, Output High Voltage

2.7

VOH, Output Low Voltage

0.4

IOH

100

µA

IOL

100

µA

POWER CONSUMPTION

Total Power Consumed, All Functions On

400

IAVDD

IDVDD

IDVDD_I/O

ICP_VDD

Power-Down Mode

WAKE-UP TIME (from Power-Down Mode)

Digital Power-Down (CFR1<7>)

DAC Power-Down (CFR2<39>)

µs

RF Divider Power-Down (CFR2<23>)

400

Clock Driver Power-Down (CFR2<20>)

µs

Charge Pump Full Power-Down (CFR2<4>)

µs

Charge Pump Quick Power-Down (CFR2<3>)

150

DAC OUTPUT CHARACTERISTICS

Resolution

Bits

Full-Scale Output Current

Gain Error

−10

+10

% FS

Output Offset

0.6

µA

Output Capacitance

Voltage Compliance Range

AVDD − 0.50

AVDD + 0.50

Wideband SFDR (DC to Nyquist)

10 MHz Analog Out

−64

dBc

40 MHz Analog Out

−62

dBc

80 MHz Analog Out

−60

dBc

120 MHz Analog Out

−55

dBc

160 MHz Analog Out

−55

dBc

Narrowband SFDR

10 MHz Analog Out (±1 MHz)

−89

dBc

10 MHz Analog Out (±250 kHz)

−91

dBc

10 MHz Analog Out (±50 kHz)

−93

dBc

40 MHz Analog Out (±1 MHz)

−87

dBc

40 MHz Analog Out (±250 kHz)

−89

dBc

40 MHz Analog Out (±50 kHz)

−91

dBc

80 MHz Analog Out (±1 MHz)

−85

dBc

80 MHz Analog Out (±250 kHz)

−87

dBc

80 MHz Analog Out (±50 kHz)

−89

dBc

120 MHz Analog Out (±1 MHz)

−83

dBc

120 MHz Analog Out (±250 kHz)

−85

dBc

120 MHz Analog Out (±50 kHz)

−87

dBc

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