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STM32F446RC датащи(PDF) 22 Page - STMicroelectronics

номер детали STM32F446RC
подробное описание детали  8- to 14-bit parallel camera interface up to 54 Mbytes
PDF  201 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32F446RC датащи(HTML) 22 Page - STMicroelectronics

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Functional overview
STM32F446xC/E
22/201
DocID027107 Rev 5
3.14
Boot modes
At startup, boot pins are used to select one out of three boot options:
Boot from user Flash
Boot from system memory
Boot from embedded SRAM
The boot loader is located in system memory. It is used to reprogram the Flash memory
through a serial (UART, I2C, CAN, SPI and USB) communication interface. Refer to
application note AN2606 for details.
3.15
Power supply schemes
VDD = 1.7 to 3.6 V: external power supply for I/Os and the internal regulator (when
enabled), provided externally through VDD pins.
VSSA, VDDA = 1.7 to 3.6 V: external analog power supplies for ADC, DAC, Reset
blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively.
Note:
VDD/VDDA minimum value of 1.7 V is obtained with the use of an external power supply
supervisor (refer to Section 3.16.2: Internal reset OFF). Refer to Table 3: Voltage regulator
configuration mode versus device operating mode to identify the packages supporting this
option.
VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and
backup registers (through power switch) when VDD is not present.
VDDUSB can be connected either to VDD or an external independent power supply (3.0
to 3.6V) for USB transceivers.
For example, when device is powered at 1.8V, an independent power supply 3.3V can
be connected to VDDUSB. When the VDDUSB is connected to a separated power supply,
it is independent from VDD or VDDA but it must be the last supply to be provided and the
first to disappear. The following conditions VDDUSB must be respected:
During power-on phase (VDD < VDD_MIN), VDDUSB should be always lower than
VDD
During power-down phase (VDD < VDD_MIN), VDDUSB should be always lower
than VDD
VDDUSB rising and falling time rate specifications must be respected.
In operating mode phase, VDDUSB could be lower or higher than VDD:
– If USB (USB OTG_HS/OTG_FS) is used, the associated GPIOs powered by
VDDUSB are operating between VDDUSB_MIN and VDDUSB_MAX.The VDDUSB
supply both USB transceiver (USB OTG_HS and USB OTG_FS).
– If only one USB transceiver is used in the application, the GPIOs associated to
the other USB transceiver are still supplied by VDDUSB.
– If USB (USB OTG_HS/OTG_FS) is not used, the associated GPIOs powered
by VDDUSB are operating between VDD_MIN and VDD_MAX.



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