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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MEC1322 датащи(PDF) 144 Page - Microchip Technology |
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MEC1322 датащи(HTML) 144 Page - Microchip Technology |
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144 / 456 page  MEC1322 DS00001719D-page 144 2014 - 2015 Microchip Technology Inc. 10.13.10 EC BYTE CONTROL REGISTER This register is aliased to the OS Byte Control Register on page 140. The OS Byte Control Register is a read only version of this register. 3CMD See CMD bit in OS STATUS OS Register on page 136 for bit description. R0b VCC1_R ESET 2 UD1A User Defined R/W 0b VCC1_R ESET 1IBF See IBF bit in OS STATUS OS Register on page 136 for bit descrip- tion. R0h VCC1_R ESET 0OBF See OBF bit in OS STATUS OS Register on page 136 for bit descrip- tion. R0h VCC1_R ESET Note: The IBF and OBF bits are not de-asserted by hardware when the host is powered off, or the LPC interface powers down; for example, following system state changes S3->S0, S5->S0, G3-> S0. For further informa- tion on how these bits are cleared, refer to IBF and OBF bit descriptions in the STATUS OS-Register defi- nition. Offset 105h Bits Description Type Default Reset Event 7:1 Reserved R - - 0 FOUR_BYTE_ACCESS See FOUR_BYTE_ACCESS bit in OS Byte Control Register on page 140 for bit description. R/W 0b VCC1_R ESET Offset 104h Bits Description Type Default Reset Event |
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