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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MEC1322 датащи(PDF) 137 Page - Microchip Technology |
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MEC1322 датащи(HTML) 137 Page - Microchip Technology |
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137 / 456 page  2014 - 2015 Microchip Technology Inc. DS00001719D-page 137 MEC1322 4BURST The BURST bit is set when the ACPI_EC is in Burst Mode for polled command processing; the BURST bit is cleared when the ACPI_EC is in Normal mode for interrupt-driven command processing. The BURST bit is an ACPI_EC-maintained software flag that indi- cates the embedded controller has received the Burst Enable com- mand from the host, has halted normal processing, and is waiting for a series of commands to be sent from the host. Burst Mode allows the OS or system management handler to quickly read and write several bytes of data at a time without the overhead of SCIs between commands. The BURST bit is maintained by ACPI_EC software, only. R0b VCC1_R ESET 3CMD This bit is set when the OS2EC Data EC Byte 0 Register contains a command byte written into ACPI OS COMMAND Register; this bit is cleared when the OS2EC DATA BYTES[3:0] contains a data byte written into the ACPI-OS DATA BYTES[3:0]. This bit is hardware controlled: • ACPI_OS writes to any of the four ACPI-OS DATA BYTES[3:0] bytes clears this bit • ACPI_OS writes to the ACPI OS COMMAND Register sets this bit. Note: This bit allows the embedded controller to differentiate the start of a command sequence from a data byte write operation. R0b VCC1_R ESET 2UD1B User Defined R0b VCC1_R ESET Offset 04h Bits Description Type Default Reset Event |
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