29 / 62 page
Ultra37000 CPLD Family
Document #: 38-03007 Rev. *C
Page 29 of 62
CY37064V
CY37128V
Typical 3.3V Power Consumption (continued)
0
5
10
15
20
25
30
35
40
45
0
2 04 06 08 0
1 0 0
1 2 0
1 4 0
Fre q ue n c y (M H z )
Low P o w e r
H igh S peed
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
VCC = 3.3V, TA = Room Temperature
0
10
20
30
40
50
60
70
80
0
2 0
4 0
6 0
8 0
100
120
140
Fr e q ue n c y ( M Hz )
L o w P o we r
H ig h S p eed
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
VCC = 3.3V, TA = Room Temperature
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
