ATmega16 datasheet(127/315 Pages) ATMEL

127 / 315 page

127

ATmega16(L)

2466E–AVR–10/02

Timer/Counter Interrupt Flag

• Bit 7 – OCF2: Output Compare Flag 2

The OCF2 bit is set (one) when a compare match occurs between the Timer/Counter2

and the data in OCR2 – Output Compare Register2. OCF2 is cleared by hardware when

executing the corresponding interrupt handling vector. Alternatively, OCF2 is cleared by

writing a logic one to the flag. When the I-bit in SREG, OCIE2 (Timer/Counter2 Com-

pare match Interrupt Enable), and OCF2 are set (one), the Timer/Counter2 Compare

match Interrupt is executed.

• Bit 6 – TOV2: Timer/Counter2 Overflow Flag

The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared

by hardware when executing the corresponding interrupt handling vector. Alternatively,

TOV2 is cleared by writing a logic one to the flag. When the SREG I-bit, TOIE2

(Time r/Cou nter2 Ove rf lo w In terrupt Enab le), and TOV2 a re set (one ), th e

Timer/Counter2 Overflow interrupt is executed. In PWM mode, this bit is set when

Timer/Counter2 changes counting direction at $00.

Timer/Counter Prescaler

Figure 64. Prescaler for Timer/Counter2

The clock source for Timer/Counter2 is named clk

T2S. clkT2S is by default connected to

the main system I/O clock clk

IO. By setting the AS2 bit in ASSR, Timer/Counter2 is asyn-

chronously clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real

Time Counter (RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from

Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve

as an independent clock source for Timer/Counter2. The Oscillator is optimized for use

with a 32.768 kHz crystal. Applying an external clock source to TOSC1 is not

recommended.

Bit

765

432

OCF2

TOV2

ICF1

OCF1A

OCF1B

TOV1

OCF0

TOV0

TIFR

Read/Write

R/W

Initial Value

10-BIT T/C PRESCALER

TIMER/COUNTER2 CLOCK SOURCE

clk

I/O

clk

T2S

TOSC1

AS2

CS20

CS21

CS22

PSR2

Clear

clk

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