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ATMEGA16 датащи(PDF) 128 Page - ATMEL Corporation |
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ATMEGA16 датащи(HTML) 128 Page - ATMEL Corporation |
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128 / 315 page ![]() 128 ATmega16(L) 2466E–AVR–10/02 For Timer/Counter2, the possible prescaled selections are: clk T2S/8, clkT2S/32, clkT2S/64, clk T2S/128, clkT2S/256, and clkT2S/1024. Additionally, clkT2S as well as 0 (stop) may be selected. Setting the PSR2 bit in SFIOR resets the prescaler. This allows the user to operate with a predictable prescaler. Special Function IO Register – SFIOR • Bit 1 – PSR2: Prescaler Reset Timer/Counter2 When this bit is written to one, the Timer/Counter2 prescaler will be reset. The bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have no effect. This bit will always be read as zero if Timer/Counter2 is clocked by the internal CPU clock. If this bit is written when Timer/Counter2 is operating in asynchronous mode, the bit will remain one until the prescaler has been reset. Bit 7 6 5 4 3 2 1 0 ADTS2 ADTS1 ADTS0 ADHSM ACME PUD PSR2 PSR10 SFIOR Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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