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SM8213 датащи(PDF) 17 Page - Nippon Precision Circuits Inc |
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SM8213 датащи(HTML) 17 Page - Nippon Precision Circuits Inc |
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17 / 33 page ![]() SM8213AM NIPPON PRECISION CIRCUITS—17 Decoder Set Command Transfer (CPU to SM8213AM) In the SM8213AM, the Break, Back-up, Write, BS- test, Start and End auxiliary modes are control sig- nals from the CPU. These modes are set by data writ- ten on SDI in sync with the SCK clock (see “Data/Flags” section). Allow a minimum of 1.67 ms after transferring each command or data before issuing the next processing command in write mode. In other modes, allow a minimum of 4.0 (1.67) [0.9] ms. When sending data from the decoder to the micro- controller, the SCK clock frequency should not be less than 1200 Hz when in write mode. In other modes, the frequency should not be less than 512 (1200) [2400] Hz. If this occurs, the SCK counter is reinitialized. This function, however, does make restoring operation easy even if this or another clock is accidentally input. Note that read mode function is described in the “Decoder Internal Status Transfer” section. Break This is the interrupt command to stop reception and data transfer. When the Break command is detected, the received code word ends and reception stops, then the device waits for self frame address detection or sync code detection timing. Reception may con- tinue for up to 32-bit units of time after the Break command is received (or 34-bit time after the Break command is sent). Even though message reception may continue for a short time when the Break command is sent, sync code detection does not take place and accordingly the received data may be deemed to have many errors. Also, when CPU BREAK input interrupt end-of- message method only is selected, message reception continues even if an address code or an idle code is present, as long as the Break command is not issued. The time required from when the Break command is issued until received data is output can be approxi- mately 2 to 3 code words at internal sync speed. Dur- ing this interval, 32 clock cycles are sent to the decoder while ATTN is LOW, and processing should be performed just as for normal operation. If no pro- cessing is performed, subsequent operation may become unstable. Back-up (Power save control) This is the decoder OFF mode command. This com- mand stops all internal operation except the oscilla- tor, and thus is used to control current consumption. (the decoder internal status is write mode). Note that in back-up mode, the input/output pins do not become high impedance. Back-up mode is released and operation restarts when the decoder set start command is issued. All parameter and address information is retained during back-up, so operation starts directly from preamble mode. Write This is the parameter and address write command. This operation mode can also be used to modify parameters and addresses. Write mode can be acti- vated from BS-test mode, and also approximately 50 ms after reset, but you should allow at least 900 ms for the oscillator internal to start and stabilize. Parameters and addresses can be changed by first issuing a decoder set command to enter write mode and then writing new parameters and addresses. Note that in write mode, all internal operation takes place with the same timing as for 1200 bps speed mode. BS1, BS2 and BS3 are held LOW. Each of the addresses can be turned ON/OFF, according to flag settings in the data written. Using this feature for a specific address in a pager allows the service provider, by prior agreement, to prohibit improper use of the pager delivery service (exclud- ing delivery testing, stopping subsidiary services and similar functions). In the SM8213AM, data writes from the microcon- troller have priority, even if a received information transmit ready signal (ATTN = LOW) is present (forced write). When reception from the decoder RF stage has prior- ity, operation switches to write mode after the end- of-message is confirmed by monitoring the internal operation using the read command. Then the param- eter set commands and address set commands are written. After writing, write mode is released using the decoder set start command, and operation starts from preamble mode. |
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