TMP007

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SBOS685C – APRIL 2014 – REVISED JULY 2015

ALRTEN:

Alert Pin Enable. Bit 8

Makes ALERT pin controlled by the alert flag bit. The ALERT pin is active low. The ALRTEN bit is mirrored in the status mask

and enable register. Writing to the ALRTEN bit in the status mask and enable register also sets this bit, and vice versa.

ALRTF:

Cumulative Alert Flag. Bit 7 (Read Only)

This flag is the logical OR of all enabled flags, and is cleared when the status register is read in INT mode or at the end of a

conversion when all enabled flags are 0 in COMP mode.

It is mirrored in Status register.

TC:

Transient Correction Enable. Bit 6

Setting this bit turns on the transient correction enabling sensor voltage and object temperature output filtering.

INT/COMP:

INT/COMP Mode. Bit 5

The INT/COMP bit controls whether the limit flags are in INTERRUPT (INT) Mode (0) or COMPARATOR (COMP) Mode (1).

It controls the behavior of the limit flags (LH, LL, OH, OL) and the data invalid flag (nDVF) from the status register.

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

T13

T12

T11

T10

T9

T8

T7

T6

T5

T4

T3

T2

T1

T0

—

nDV

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

T13 to T0:

Temperature result. Bits 15 to 2

The data format is twos complement, 14 bits, and 0.03125°C per LSB. Full scale allows a result of up to ±256°C. Reset

value is 00h.

nDV:

Data invalid bit. Bit 0

If this bit is set, it indicates that the calculated object temperature is not valid due to invalid operations in the math engine.

The bit is reset in the next valid conversion.

7.5.5 Status Register (address = 04h) [reset = 0000h]

The status register flags are activated whenever their limit is violated, and latch if the INT/COMP bit is in INT

mode (see configuration register). In INT mode these flags are cleared only when the status register is read. If

the flag is set from a previous conversion, and at the end of the next conversion, the corresponding limit is not

violating anymore, the flag is not cleared when in INT mode. In COMP mode, these flags are set whenever the

corresponding limit is violated at the end of a conversion, and cleared if they are not.

Figure 34. Status Register

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

ALRTF

CRTF

OHF

OLF

LHF

LLF

nVDF

MCRPT

SNRL

—

—

—

—

—

—

—

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

R-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

ALRTF:

Cumulative Alert Flag Bit. Bit 15

This flag is the logical OR of all enabled flags, and is cleared when the status register is read in INT mode or at the end of a

conversion when all enabled flags are 0 in COMP mode.

CRTF:

Conversion Ready Flag. Bit 14

The conversion ready flag is provided to help coordinate one-shot conversions for temperature measurements. The bit is set

after the local and object temperature conversions have completed and the results are ready to be read in the result registers.

This flag can be cleared by reading the status register, writing to the configuration register or reading any of the results registers

OHF:

Object Temperature High Limit Flag. Bit 13

This bit is set to 1 if the result in the object temperature register exceeds the value in the object temperature high limit register.

In INT mode, this bit is cleared when the status register is read.

OLF:

Object Temperature Low Limit Flag. Bit 12

This bit is set to 1 if the result in the object temperature register is less than the value in the object temperature low limit register.

In INT mode, this bit is cleared when the status register is read. In COMP mode, this bit is disabled and always reads 0.

LHF:

object temperature low limit. In INT mode, the bit is cleared when the status register is read.

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