TMP007 datasheet(25/55 Pages) TI

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TMP007

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SBOS685C – APRIL 2014 – REVISED JULY 2015

Device Functional Modes (continued)

7.4.3 Nonvolatile Memory Description

7.4.3.1 Programming the Nonvolatile Memory

The TMP007 has an internal memory that can be programmed eight times. This internal memory stores power-

on reset (POR) values for all writeable registers in the register map. The default POR values for each register are

used if their memory location has not been overwritten through the I2C interface. The stored values in memory

are loaded at power up, software reset, general load command, single load command, or SMBus general call

reset.

On a memory store, bits NWr2:0 are incremented and indicate the number of writes remaining, as described in

Table 6. Note the ambiguity in condition for code 000. Every memory location is individually writable, and the

value returned for NWr depends on how many times that individual memory location has previously been written.

Table 6. Number of Writes Remaining to Nonvolatile Memory

NWr_2

NWR_1

NWR_0

TOTAL NUMBER WRITES PERFORMED

TOTAL NUMBER OF WRITES REMAINING

To program the memory, write the desired value in the appropriate register address. Then write to the memory

access register (2Ah) with 6Ah in the MSB (B15:B8), the 5-bit register address in B7:B3, and 1 in B1 (the single

write bit in the same write operation). If 6Ah prefix code is not written, then the write operation is ignored. A

sample flow is shown in Figure 29.

Figure 29. Sample Flow

Write Value to Target Register

Write to Memory Access Register Address 2Ah

2Ah

Bit

Name

NWr_2

NWr_1

NWr_0

Mem. Crpt

–

Adr4

Adr3

Adr2

Adr1

Adr0

Gen Load

MEM Store

Sin Load.

Value

Clear Target Register

Write to Memory Access Register (2Ah) to Load Value from Memory to Target Register

2Ah

Bit

Name

NWr_2

NWr_1

NWr_0

Mem. Crpt

–

Adr4

Adr3

Adr2

Adr1

Adr0

Gen Load

MEM Store

Sin Load.

Value

Read Target Register to Verify Programming

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