ZL6105ALAF datasheet(23/35 Pages) INTERSIL

23 / 35 page

ZL6105

FN6906.5

December 19, 2013

If the desired UVLO threshold is not one of the listed choices, the

user can configure a threshold between 2.85V and 16V by

connecting a resistor between the UVLO pin and SGND by

selecting the appropriate resistor from Table 19.

The UVLO voltage can also be set to any value between 2.85V

and 16V via the I2C/SMBus interface.

Once an input undervoltage fault condition occurs, the device

can respond in a number of ways as follows:

1. Continue operating without interruption.

2. Continue operating for a given delay period, followed by

shutdown if the fault still exists. The device will remain in

shutdown until instructed to restart.

3. Initiate an immediate shutdown until the fault has been

cleared. The user can select a specific number of retry

attempts.

The default response from a UVLO fault is an immediate

shutdown of the device. The device will continuously check for

the presence of the fault condition. If the fault condition is no

longer present, the ZL6105 will be re-enabled.

Please refer to Application Note AN2033 for details on how to

configure the UVLO threshold or to select specific UVLO fault

response options via the I2C/SMBus interface.

Output Overvoltage Protection

The ZL6105 offers an internal output overvoltage protection

circuit that can be used to protect sensitive load circuitry from

being subjected to a voltage higher than its prescribed limits. A

hardware comparator is used to compare the actual output

voltage (seen at the VSEN pin) to a threshold set to 15% higher

than the target output voltage (the default setting). If the VSEN

voltage exceeds this threshold, the PG pin will de-assert and the

device can then respond in a number of ways as follows:

1. Initiate an immediate shutdown until the fault has been

cleared. The user can select a specific number of retry

attempts.

2. Turn off the high-side MOSFET and turn on the low-side

MOSFET. The low-side MOSFET remains ON until the device

attempts a restart.

The default response from an overvoltage fault is to immediately

shut down. The device will continuously check for the presence of

the fault condition, and when the fault condition no longer exists

the device will be re-enabled.

For continuous overvoltage protection when operating from an

external clock, the only allowed response is an immediate

shutdown.

Please refer to Application Note AN2033 for details on how to

select specific overvoltage fault response options via I2C/SMBus.

Output Pre-Bias Protection

An output pre-bias condition exists when an externally applied

voltage is present on a power supply’s output before the power

supply’s control IC is enabled. Certain applications require that

the converter not be allowed to sink current during start up if a

pre-bias condition exists at the output. The ZL6105 provides

pre-bias protection by sampling the output voltage prior to

initiating an output ramp.

If a pre-bias voltage lower than the target voltage exists after the

pre-configured delay period has expired, the target voltage is set

to match the existing pre-bias voltage and both drivers are

enabled. The output voltage is then ramped to the final

regulation value at the ramp rate set by the SS pin.

The actual time the output will take to ramp from the pre-bias

voltage to the target voltage will vary depending on the pre-bias

voltage but the total time elapsed from when the delay period

expires and when the output reaches its target value will match

the pre-configured ramp time. See Figure 14.

If a pre-bias voltage higher than the target voltage exists after the

pre-configured delay period has expired, the target voltage is set

to match the existing pre-bias voltage and both drivers are

enabled with a PWM duty cycle that would ideally create the pre-

bias voltage.

Once the pre-configured soft-start ramp period has expired, the

PG pin will be asserted (assuming the pre-bias voltage is not

higher than the overvoltage limit). The PWM will then adjust its

duty cycle to match the original target voltage and the output will

ramp down to the pre-configured output voltage.

If a pre-bias voltage higher than the overvoltage limit exists, the

device will not initiate a turn-on sequence and will declare an

overvoltage fault condition to exist. In this case, the device will

respond based on the output overvoltage fault response method

that has been selected. See “Output Overvoltage Protection” on

page 23 for response options due to an overvoltage condition.

TABLE 19. UVLO THRESHOLD RESISTOR SETTINGS

RUVLO

Ω)

UVLO

(V)

RUVLO

Ω)

UVLO

(V)

17.8

2.85

46.4

7.42

19.6

3.14

51.1

8.18

21.5

3.44

56.2

8.99

23.7

3.79

61.9

9.9

26.1

4.18

68.1

10.9

28.7

4.59

31.6

5.06

82.5

13.2

34.8

5.57

90.9

14.54

38.3

6.13

100

42.2

6.75

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