ZL6105ALAF datasheet(8/35 Pages) INTERSIL

8 / 35 page

ZL6105

FN6906.5

December 19, 2013

Current Sense Input Bias Current

(Vout Referenced, Vout < 4.0V)

ISENA

-1

–

µA

ISENB

-100

–

100

µA

Soft-start Delay Duration Range

Set using SS pin or resistor (Note 15)

–

Set using I2C/SMBus (Note 15)

0.005

–

500

Soft-start Delay Duration Accuracy

Turn-on delay (Note 15)

-0.25/+4

Turn-off delay (Note 15)

-0.25/+4

Soft-start Ramp Duration Range

Set using SS pin or resistor

–

Set using I2C

–

200

Soft-start Ramp Duration Accuracy

–

100

–

µs

Logic Input/Output Characteristics

Logic Input Leakage Current

EN, SCL, SDA pins

-250

–

250

Logic Input Low, VIL

–

0.8

Logic Input OPEN (N/C)

Multi-mode logic pins

–

1.4

–

Logic Input High, VIH

2.0

–

Logic Output Low, VOL

IOL ≤ 4mA (Note 20)

–

0.4

Logic Output High, VOH

IOH ≥ -2mA (Note 20)

2.25

–

Oscillator and Switching Characteristics

Switching Frequency Range

200

–

1400

kHz

Switching Frequency Set-point Accuracy

Predefined settings (See Table 11)

-5

–

Maximum Pwm Duty Cycle

Factory default

–

Minimum Sync Pulse Width

150

–

Input Clock Frequency Drift Tolerance

External clock source

-13

–

Gate Drivers

High-side driver voltage (VBST -VSW)

–

4.5

–

High-side Driver Peak Gate Drive

Current (Pull-down)

(VBST -VSW) = 4.5V

–

High-side Driver Pull-up Resistance

(VBST -VSW) = 4.5V, (VBST -VGH) = 50mV

–

0.8

High-side Driver Pull-down Resistance

(VBST -VSW) = 4.5V, (VGH -VSW) = 50mV

–

0.5

Low-side Driver Peak Gate

Drive Current (Pull-up)

VR = 5V

–

2.5

–

Low-side Driver Peak Gate

Drive Current (Pull-down)

VR = 5V

–

1.8

–

Low-side Driver Pull-up Resistance

VR = 5V, (VR -VGL) = 50mV

–

1.2

Low-side Driver Pull-down Resistance

VR = 5V, (VGL -PGND) = 50mV

–

0.5

Switching Timing

Gh Rise and Fall Time

Gl Rise and Fall Time

(VBST -VSW) = 4.5V, CLOAD = 2.2nF

–

VR = 5V, CLOAD = 2.2nF

–

Tracking

VTRK Input Bias Current

VTRK = 5.5V

–

110

200

µA

VTRK Tracking Ramp Accuracy

100% Tracking, VOUT -VTRK, no prebias

-100

–

+ 100

VTRK Regulation Accuracy

100% Tracking, VOUT -VTRK

-1

–

Fault Protection Characteristics

UVLO Threshold Range

Configurable via I2C/SMBus

2.85

–

UVLO Set-point Accuracy

-150

–

150

UVLO Hysteresis

Factory default

–

Configurable via I2C/SMBus

–

100

Electrical Specifications V

DD = 12V, TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = +25°C. Boldface limits apply over

the operating temperature range, -40°C to +85°C. (Continued)

PARAMETER

CONDITIONS

MIN

(Note 19)

TYP

MAX

(Note 19)

UNIT

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