UCD3138ARMHT datasheet(71/83 Pages) TI

71 / 83 page

UCD3138A

www.ti.com

SLUSC66B – MARCH 2015 – REVISED MAY 2015

8.4

Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.5

Export Control Notice

Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data

(as defined by the U.S., EU, and other Export Administration Regulations) including software, or any

controlled product restricted by other applicable national regulations, received from disclosing party under

nondisclosure obligations (if any), or any direct product of such technology, to any destination to which

such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior

authorization from U.S. Department of Commerce and other competent Government authorities to the

extent required by those laws.

8.6

Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

Mechanical Packaging and Orderable Information

9.1

Via Channel

The [your package] package has been specially engineered with Via Channel technology. This allows

larger than normal PCB via and trace sizes and reduced PCB signal layers to be used in a PCB design

with the 0.65-mm pitch package, and substantially reduces PCB costs. It allows PCB routing in only two

signal layers (four layers total) due to the increased layer efficiency of the Via Channel BGA technology.

Via Channel technology implemented on the [your package] package makes it possible to build an [your

device]-based product with a 4-layer PCB, but a 4-layer PCB may not meet system performance goals.

Therefore, system performance using a 4-layer PCB design must be evaluated during product design.

9.2

Packaging Information

The following pages include mechanical packaging and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and

revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Mechanical Packaging and Orderable Information

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