LTC1286CS8 datasheet(15/24 Pages) LINER

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LTC1286/LTC1298

APPLICATION INFORMATION

BOARD LAYOUT CONSIDERATIONS

Grounding and Bypassing

The LTC1286/LTC1298 are easy to use if some care is

taken. They should be used with an analog ground plane

and single point grounding techniques. The GND pin

should be tied directly to the ground plane.

The VCC pin should be bypassed to the ground plane with

a 10

µF tantalum capacitor with leads as short as possible.

If the power supply is clean, the LTC1286/LTC1298 can

also operate with smaller 1

µF or less surface mount or

ceramic bypass capacitors. All analog inputs should be

referenced directly to the single point ground. Digital

inputs and outputs should be shielded from and/or routed

away from the reference and analog circuitry.

SAMPLE-AND-HOLD

Both the LTC1286 and the LTC1298 provide a built-in

sample-and-hold (S&H) function to acquire signals. The

S&H of the LTC1286 acquires input signals from “+” input

relative to “–” input during the tSMPL time (see Figure 1).

However, the S&H of the LTC1298 can sample input

signals in the single-ended mode or in the differential

inputs during the tSMPL time (see Figure 7).

Single-Ended Inputs

The sample-and-hold of the LTC1298 allows conversion

of rapidly varying signals. The input voltage is sampled

during the tSMPL time as shown in Figure 7. The sampling

interval begins as the bit preceding the MSBF bit is shifted

in and continues until the falling CLK edge after the MSBF

bit is received. On this falling edge, the S&H goes into hold

mode and the conversion begins.

Figure 7. LTC1298 “+” and “–” Input Settling Windows

CLK

DIN

DOUT

"+" INPUT

"–" INPUT

SAMPLE

HOLD

"+" INPUT MUST

SETTLE DURING

THIS TIME

tSMPL

tCONV

SGL/DIFF

START

MSBF

DON'T CARE

1ST BIT TEST "–" INPUT MUST

SETTLE DURING THIS TIME

B11

LTC1096/8 • F07

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