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PM0214 датащи(PDF) 174 Page - STMicroelectronics |
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PM0214 датащи(HTML) 174 Page - STMicroelectronics |
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174 / 245 page ![]() The STM32 Cortex-M4 instruction set PM0214 174/245 DocID022708 Rev 4 MRS R0, PRIMASK ; Read PRIMASK value and write it to R0 3.11.7 MSR Move the contents of a general-purpose register into the specified special register. Syntax MSR{cond} spec_reg, Rn where: • ‘cond’ is an optional condition code, see Conditional execution on page 64. • ‘Rn’ is the source register. • ‘spec_reg’ can be any of: APSR, IPSR, EPSR, IEPSR, IAPSR, EAPSR, PSR, MSP, PSP, PRIMASK, BASEPRI, BASEPRI_MAX, FAULTMASK, or CONTROL. Operation The register access operation in MSR depends on the privilege level. Unprivileged software can only access the APSR, see Table 5: APSR bit definitions on page 20. Privileged software can access all special registers. In unprivileged software writes to unallocated or execution state bits in the PSR are ignored. When you write to BASEPRI_MAX, the instruction writes to BASEPRI only if either: • Rn is non-zero and the current BASEPRI value is 0 • Rn is non-zero and less than the current BASEPRI value. See MRS on page 173. Restrictions Rn must not be SP and must not be PC. Condition flags This instruction updates the flags explicitly based on the value in Rn. Examples MSR CONTROL, R1 ; Read R1 value and write it to the CONTROL register |
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