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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM0214 датащи(PDF) 155 Page - STMicroelectronics |
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PM0214 датащи(HTML) 155 Page - STMicroelectronics |
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155 / 245 page  DocID022708 Rev 4 155/245 PM0214 The STM32 Cortex-M4 instruction set 244 Condition flags These instructions do not change the flags. 3.10.9 VFNMA, VFNMS Floating-point Fused Negate Multiply Accumulate and Subtract. Syntax VFNMA{cond}.F32 {Sd,} Sn, Sm VFNMS{cond}.F32 {Sd,} Sn, Sm where: • ‘cond’ is an optional condition code, see Conditional execution on page 64. • ‘Sd’ is the destination register • ‘Sn, Sm’ are the operand registers. Operation The VFNMA instruction: 1. Negates the first floating-point operand register. 2. Multiplies the first floating-point operand with second floating-point operand. 3. Adds the negation of the floating -point destination register to the product 4. Places the result into the destination register. The result of the multiply is not rounded before the addition. The VFNMS instruction: 1. Multiplies the first floating-point operand with second floating-point operand. 2. Adds the negation of the floating-point value in the destination register to the product. 3. Places the result in the destination register. The result of the multiply is not rounded before the addition. Restrictions There are no restrictions. Condition flags These instructions do not change the flags. |
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