PM0214 datasheet(151/245 Pages) STMICROELECTRONICS

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PM0214

The STM32 Cortex-M4 instruction set

244

Condition flags

When this instruction writes the result to the FPSCR flags, the values are normally

transferred to the ARM flags by a subsequent VMRS instruction, see VMRS on page 162.

Examples

VCMP.F32

S4, #0.0

VCMP.F32

S4, S2

3.10.4

VCVT, VCVTR between floating-point and integer

Converts a value in a register from floating-point to a 32-bit integer.

Syntax

VCVT{R}{cond}.Tm.F32 Sd, Sm

VCVT{cond}.F32.Tm Sd, Sm

where:

•

‘R’ .

If R is specified, the operation uses the rounding mode specified by the FPSCR.

If R is omitted. the operation uses the Round towards Zero rounding mode.

•

‘cond’ is an optional condition code, see Conditional execution on page 64.

•

‘Tm’ is the data type for the operand. It must be one of:

S32

signed 32-bit value.

U32

unsigned 32-bit value.

•

‘Sd, Sm’ are the destination register and the operand register.

Operation

These instructions:

Either

•

Converts a value in a register from floating-point value to a 32-bit integer.

•

Converts from a 32-bit integer to floating-point value.

Places the result in a second register.

The floating-point to integer operation normally uses the Round towards Zero rounding

mode, but can optionally use the rounding mode specified by the FPSCR.

The integer to floating-point operation uses the rounding mode specified by the FPSCR.

Restrictions

There are no restrictions.

Condition flags

These instructions do not change the flags.

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