UPD62AMC datasheet(28/62 Pages) NEC

28 / 62 page

µPD62A

Data Sheet U14474EJ1V0DS00

7.1 Functions of POC Circuit

The POC circuit has the following functions:

• Generating an internal reset signal when VDD

≤ VPOC.

• Canceling an internal reset signal when VDD > VPOC.

Here, VDD: power supply voltage, VPOC: POC-detected voltage.

Notes 1. In reality, oscillation stabilization wait time must elapse before the circuit is switched to operating

mode. The oscillation stabilization wait time is about 252/fX to 700/fX (about 70 to 190

µs: when fX

= 3.64 MHz).

2. For the POC circuit to generate an internal reset signal when the power supply voltage has fallen,

it is necessary for the power supply voltage to be kept less than the VPOC for a period of 1 ms or more.

Therefore, in reality, there is a time lag of up to 1 ms until the reset takes effect.

3. The POC-detected voltage (VPOC) varies between about 1.7 to 2.0 V; thus, the reset may be canceled

at a power supply voltage smaller than the assured range (VDD = 2.0 to 3.6 V). However, as long as

the conditions for operating the POC circuit are met, the actual lowest operating power supply voltage

becomes lower than the POC-detected voltage. Therefore, there is no malfunction occurring due to

the shortage of power supply voltage. However, malfunction for such reasons as the clock not

oscillating due to low power supply voltage may occur (refer to Cautions 3. in 7. POC CIRCUIT).

7.2 Oscillation Check at Low Supply Voltage

A reliable reset operation can be expected of the POC circuit if it satisfies the condition that the clock can oscillate

even at low power supply voltage (the oscillation start voltage of the resonator being even lower than the POC-

detected voltage). Whether this condition is met or not can be checked by measuring the oscillation status on a

product which actually contains a POC circuit, as follows.

<1> Connect a storage oscilloscope to the XOUT pin so that the oscillation status can be measured.

<2> Connect a power supply whose output voltage can be varied and then gradually raise the power supply

voltage VDD from 0 V (making sure to avoid VDD > 3.6 V).

At first (during VDD < 1.7 V (approx.)), the XOUT pin is 0 V regardless of the VDD. However, at the point that VDD

reaches the POC-detected voltage (VPOC = 1.85 V (TYP.)), the voltage of the XOUT pin jumps to about 0.5 VDD.

Maintain this power supply voltage for a while to measure the waveform of the XOUT pin. If, by any chance, the

oscillation start voltage of the resonator is lower than the POC-detected voltage, the growing oscillation of the XOUT

pin can be confirmed within several ms after the VDD has reached the VPOC.

VDD

3.6 V

2.0 V

VPOC

1.7 V (approx.)

0 V

Internal reset signal

Reset

Operating ambient temperature TA = –40 to +85

°C

Clock frequency fX = 2.4 to 8 MHz

←POC-detected voltage VPOC = 1.85 V (TYP.)Note 3

→ t

Operating mode

↑ Reset

Note 2

↑

Note 1

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