UPD62AMC datasheet(24/62 Pages) NEC

24 / 62 page

µPD62A

Data Sheet U14474EJ1V0DS00

Table 5-3. Standby Mode Settings (HALT #b3b2b1b0B) and Release Conditions

Operand Value of

HALT Instruction

Setting Mode

Setting Precondition

Release Condition

0000

STOP

All KI/O pins are high-level output.

High level input to at least one

of KI pins.

STOP

All KI/O pins are high-level output.

High level input to at least one

of KI pins.

STOPNote 1

The KI/O0 pin is high-level output.

High level input to at least one

of KI pins.

Any combination of

STOP

[The following condition is added in addition to the above.]

b2b1b0 above

—

High level input to at least one

of S0 and S1 pinsNote 2.

0/1

HALT

—

When the timer’s down counter is 0

Notes 1. When setting HALT #

×110B, configure a key matrix by using the KI/O0 pin and the KI pin so that an

internal reset takes effect at the time of program hang-up.

2. At least one of the S0 and S1 pins (the pin used for releasing standby) must be in input mode. (Note

that an internal reset does not take effect even when both pins are in output mode.)

Cautions 1. The internal reset takes effect when the HALT instruction is executed with an operand value

other than that above or when the precondition has not been satisfied when executing the

HALT instruction.

2. If STOP mode is set when the timer’s down counter is not 0 (timer operating), the system

is placed in STOP mode only after all the 10 bits of the timer’s down counter and the timer

output permit flag are cleared to 0.

3. Write the NOP instruction as the first instruction after STOP mode is released.

5.3 Standby Mode Release Timing

(1) STOP mode release timing

Figure 5-1. STOP Mode Cancelation by Release Condition

Caution When a release condition is established in the STOP mode, the device is released from the STOP

mode, and goes into a wait state. At this time, if the release condition is not held, the device

goes into STOP mode again after the wait time has elapsed. Therefore, when releasing the STOP

mode, it is necessary to hold the release condition longer than the wait time.

Wait

(52/fX +

α)

HALT mode

Operating

mode

STOP mode

Oscillation

stopped

Oscillation

Operating

mode

Oscillation

HALT instruction

(STOP mode)

Standby

release signal

Clock

α : Oscillation growth time

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