AN4650 datasheet(52/102 Pages) STMICROELECTRONICS

52 / 102 page

Android embedded functions

AN4650

52/102

DocID027415 Rev 1

The Step Counter overflow signal can be driven to the INT2 interrupt pin by setting to 1 the

INT2_STEP_COUNT_OV bit of the INT2_CTRL register: in this case, when the step count

reaches the 216 value, an interrupt signal is generated on the INT2 pin and the step count

has to be reset to zero by setting to 1 the PEDO_RST_STEP bit.

If latch mode is disabled (LIR bit of TAP_CFG is set to 0), the interrupt signal generated by

the pedometer functions is pulsed: the duration of the pulse observed on the interrupt pins is

about 60

s; the duration of the pulse observed on the bits STEP_COUNT_DELTA_IA,

STEP_DETECTED_IA and STEP_OVERFLOW of the FUNC_SRC register is 1/26 Hz.

If latch mode is enabled (LIR bit of TAP_CFG is set to 1) and the interrupt signal is driven to

the interrupt pins, once a step has occurred, a reading of the FUNC_SRC register clears the

request on both the pins and the STEP_COUNT_DELTA_IA, STEP_DETECTED_IA and

STEP_OVERFLOW bits of the FUNC_SRC register, and the device is ready to recognize

the next step. If latch mode is enabled but the interrupt signal is not driven to the interrupt

pins, the interrupt signal observed on the bits of the FUNC_SRC register is pulsed, with a

fixed duration of 1/26 Hz.

Step counter time stamp information is available in the STEP_TIMESTAMP_H and

STEP_TIMESTAMP_L registers: when a step is detected, the value of the

TIMESTAMP_REG2 register is copied in STEP_TIMESTAMP_H, and the value of the

TIMESTAMP_REG1 register is copied in STEP_TIMESTAMP_L, providing the time stamp

information of this step. For more details about LSM6DS3 time stamp counter and

TIMESTAMP_REG2/TIMESTAMP_REG1, see Section 5.4.

The step counter time stamp resolution depends on the value of the TIMER_HR bit of the

WAKE_UP_DUR register: when this bit is set to 0, 1 LSB of the time step count corresponds

to 1638.4 ms; when this bit is set to 1, 1 LSB of the time step count corresponds to 6.4 ms.

Step counter data can be stored in FIFO as a fourth data set along with time stamp data

(see Section 8.9 for more details).

Hereafter a basic SW routine which shows how to enable the pedometer functions:

The interrupt signal is generated when a step is recognized and the step count is available

by reading the STEP_COUNTER_H / STEP_COUNTER_L registers.

5.2

Significant motion

The Significant Motion function generates an interrupt when a ‘significant motion’, that could

be due to a change in user location, is detected: in the LSM6DS3 device this function has

been implemented in hardware using only the accelerometer.

Significant Motion functionality can be used in location-based applications in order to

receive a notification indicating when the user is changing location.

Write 20h into CTRL1_XL

// Turn on the accelerometer

// ODR_XL = 26 Hz, FS_XL = 2g

Write 3Ch into CTRL10_C

// Enable embedded functions

Write 40h into TAP_CFG

// Enable pedometer algorithm

Write 80h into INT1_CTRL

// Step Detector interrupt driven to INT1 pin

AN4650 датащи(PDF) 52 Page - STMicroelectronics

AN4650 датащи(HTML) 52 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL