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AN3316 датащи(PDF) 22 Page - STMicroelectronics

номер детали AN3316
подробное описание детали  SPC560B power and mode management
PDF  42 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN3316 датащи(HTML) 22 Page - STMicroelectronics

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Device modes
AN3316
22/42
Doc ID 18232 Rev 2
So, to get PLL freq = 64MHz, in case of XTALat8MHz, registers configuration should
be:
CGM.FMPLL[0].CR.B.IDF = 0 (divide by 1)
CGM.FMPLL[0].CR.B.ODF = 2 (divide by 8)
CGM.FMPLL[0].CR.B.NDIV = 64 (multiply for 64)
3.
RUN0 mode config:
ME_RUN0_MC.XOSC0ON = 1 (turn-on the XTAL)
ME_RUN0_MC.PLL0ON = 1 (turn-on the PLL)
ME_RUN0_MC.SYSCLK = 4 (set PLL as device system clock)
4.
Periphs mode config:
ME_RUN_PC0.RUN0 = 1 (activate running peripheral configuration ’0’ in RUN0)
ME_PCTL[4].RUN_CFG = 0 to select the running peripheral configuration ’0’ for DSPI0
identified by offset = 4 (refer to figure x)
ME_PCTL[32].RUN_CFG = 0 to select the running peripheral configuration ’0’ for ADC
identified by offset = 32 (refer to figure x)
5.
Timer config:
See Step 7 (DRUN
RUN0 mode)
Table 5.
Output divide ratio
ODF[1:0]
Output divide ratios
00
Divide by 2
01
Divide by 4
10
Divide by 8
11
Divide by 16
Table 6.
SPC560B54/6x peripheral clock sources
Peripheral
Register gatin address offset
(base = 0xC3FDC0C0)
Peripheral set
RPP_ZOH platform
None (managed through ME mode)
—
DSPin
4+n
2
FlexCANn
16+n
2
BAM
None (31 reserved)
—
ADC
32
3



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