AN3316 datasheet(12/42 Pages) STMICROELECTRONICS

12 / 42 page

Device modes

AN3316

12/42

Doc ID 18232 Rev 2

Figure 5.

Power Domain 0 architecture

2.3

Key advantages of Mode Entry

The purpose of the Mode Entry (ME) is to centralize the control of all device modes and

related parameters within a unique module.

Following main advantages:

●

Controls the target mode’s parameters and mode transition without CPU intervention

(see Section 2.3.1: Transition control)

●

Power modes managment centralaized (see Section 2.3.2: Modules/peripherals

configuration)

●

Provides a SAFE mode to manage HW failure (see Section 2.3.3: HW failure and error

modes management)

2.3.1

Transition control

Mode transition is performed by writing ME_MCTL register twice:

●

1st write: TARGET_MODE + KEY

●

2nd write: TARGET_MODE + INVERTED KEY

Once the double writing is done, the complete transition could be triggered by following bits:

●

S_MTRANS bit of Global Status Register (ME_GS)

–

S_MTRANS = 0 (Transition not active)

–

S_MTRANS = 1 (Transition ongoing)

●

I_MTC bit of Interrupt Status Register (ME_IS)

–

I_MTC = 0 (No transition complete)

–

I_MTC = 1 (Transition complete)

Note:

Bit I_MTC is not set in case of transition to low power modes (HALT / STOP)

2.3.2

Modules/peripherals configuration

Either modules or peripherals are managed by ME.

PD0

Part of

Magic carpet

API/

RTC

Wake-up

Logic

RESET &

Wake-up

vector

128KHz

IRC

16 MHz

IRC

PCU

RGM

RAM

32KHz

XTAL

CAN

Sampler

(Always On

domain)

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