AN3316 datasheet(19/42 Pages) STMICROELECTRONICS

19 / 42 page

AN3316

Device modes

Doc ID 18232 Rev 2

19/42

Common HW aspects

As already said, other than sw configuration that should be taken care by the application,

there are some operations that are performed by HW and that are common to the scenarios

after described:

●

<target mode> configuration check

While programming the mode configuration registers ME_<target mode>_MC, some rules

must be respected.

For example, if PLL is set to be the system clock in <target mode>, PLL should be turned

on. Otherwise, the write operation is ignored and an invalid mode configuration event may

be generated. Please refer to Error Management Chapter for detailed informations.

●

<target mode> transition parameters check

There are some conditions that make the transition request invalid. For example, if the target

mode is not a valid mode with respect to current mode.

In this case, an invalid mode transition event may be generated. Please refer to Error

Management Chapter for detailed informations.

●

<target mode> modules/peripherals switching on/off

Once the transition is requested by sw, the HW is in charge of switching on/off all

modules/peripherals. Now, if a module failure happens (i.e: XTAL or PLL lock failures) the

transition stalls in an ongoing status. However, The failures can be managed via software.

Please refer to Error Management Chapter for detailed informations.

For this reason, in order to prevent to stuck the code waiting for transition completion, it

could be better to set a timer, before entering in RUN0 mode, that, if expired, is able to signal

every potential issue.

Timeout calculation should be based on modules/peripherals start-up timing and, so, varies

case by case.

Scenario 1 (DRUN  RUNx)

This scenario is a typical application that starts from a default mode and transits to a full

device performance user mode. Following is the configuration of each mode.

Figure 10.

Node configuration

Following flow diagram describes the transition steps:

DRUN

RUN0

XTAL, PLL = OFF

sysclk = FIRC-16MHz

CFLASH, DFLASH = ON

all periphs = OFF

XTAL, PLL = OFF

sysclk = PLL-64MHz

CFLASH, DFLASH = ON

SPIO,ADCO = ON

AN3316 датащи(PDF) 19 Page - STMicroelectronics

AN3316 датащи(HTML) 19 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

датащи скачать

ссылки URL