70353C datasheet(73/76 Pages) MICROCHIP

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DS70353C-page 21-73

Section 21. Enhanced Controller Area Network (ECAN™)

21.16

REVISION HISTORY

Revision A (November 2008)

This is the initial released version of this document.

Revision B (March 2011)

This revision incorporates the following updates:

• Updated all DMA RAM references to device RAM

• Updated all time quanta clock (FTQ) references to time quantum frequency (FTQ)

• Updated all Remote Request Frame references to Remote Frame

• Updated all dsPIC33E references to dsPIC33E/PIC24E

•Buffers:

- Updated the bit value description for bit 1 and bit 0 in ECAN Message Buffer Word 0

- Updated the bit value description for bit 9 in ECAN Message Buffer Word 2

• Figures:

- Updated Figure 21-1

- Updated the label Message Buffer (DMA RAM) as Message Buffer (Device RAM) in

Figure 21-2

- Updated the logical value of SRR bit from ‘0’ to ‘1’ in Figure 21-5

- Removed “Figure 21-17: ECAN™ Message Buffer Memory Usage” in 21.8 “DMA

Controller Configuration”

- Updated the figure title for Figure 21-9

- Changed Baud Rate Prescaler input FCY to FCAN in Figure 21-17

- Updated Figure 21-18

•Examples:

- Updated Example 21-1 through Example 21-7 and Example 21-9

• Equations:

- Changed FCY to FCAN in Equation 21-3

• Notes:

- Added a note on setting the TXREQm bit in 21.6.1 “Message Transmission Flow”

- Deleted the following note in 21.6.1 “Message Transmission Flow”: Avoid setting

the TXREQ bit for a buffer that is configured for RX. Doing so can result in erroneous

operation

- Added a note in 21.6.3.2 “Respond to a Remote Frame”

- Added a note on 21.7.2.2 “Receiving Messages Into Message Buffers 0-7”

- Updated the entire note in Figure 21-14

- Added a note on DeviceNet Filtering feature in 21.7.5 “DeviceNet™ Filtering”

- Added a note that provides additional details on the highest priority CAN interrupt

condition in 21.11.3 “ECAN Event Interrupt”

- Updated the note on ECAN wake-up filter in 21.12.3 “Wake-up Functions”

•Registers:

- A general notes was added and FCY was changed to FCAN for the BRP<5:0> bit value

definitions in Register 21-1

- Updated the bit description for bit 15-13 in Register 21-18

- Added the CANCKS bit in Register 21-23

- Updated the bit value description for bit 2 in Register 21-25

• Sections:

- Updated the Message Reception key feature in 21.1 “Introduction”

- Removed the following frame type from the list of CAN bus protocol supports four

frame types, in 21.2 “CAN Message Formats”: Interframe Space – provides a

separation between successive frames

- Updated 21.1.2 “Message Buffers” and 21.1.3 “DMA Controller”

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