376 datasheet(60/95 Pages) INTEL

60 / 95 page

376 EMBEDDED PROCESSOR

In typical designs

the external pull-up resistors

shown in Table 61 are recommended However a

particular design may have reason to adjust the re-

sistor values recommended here or alter the use of

pull-up resistors in other ways

Table 61 Recommended

Resistor Pull-Ups to VCC

Pin Signal Pull-Up Value

Purpose

16 ADS

20 KX g 10% Lightly Pull ADS

Inactive during 80376

Hold Acknowledge

States

26 LOCK

20 KX g 10% Lightly Pull LOCK

Inactive during 80376

Hold Acknowledge

States

OTHER CONNECTION RECOMMENDATIONS

For reliable operation always connect unused in-

puts to an appropriate signal level NC pins should

always remain unconnected Connection of NC

pins to VCC or VSS will result in incompatibility

with future steppings of the 80376

Particularly when not using interrupts or bus hold (as

when first prototyping) prevent any chance of spuri-

ous activity by connecting these associated inputs to

GND

INTR

NMI

HOLD

If not using address pipelining connect the NA pin to

a pull-up resistor in the range of 20 KX to VCC

62 Absolute Maximum Ratings

Table 62 Maximum Ratings

Parameter

Maximum Rating

Storage Temperature

65 Cto a150 C

Case Temperature

65 Cto a120 C

under Bias

Supply Voltage with

05V to a65V

Respect to VSS

Voltage on Other Pins

05V to (VCC a 05)V

Table 62 gives a stress ratings only and functional

operation at the maximums is not guaranteed Func-

tional operating conditions are given in Section 63

DC Specifications

and Section 64 AC Specifi-

cations

Extended exposure to the Maximum Ratings may af-

fect device reliability

Furthermore

although the

80376 contains protective circuitry to resist damage

from static electric discharge always take precau-

tions to avoid high static voltages or electric fields

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