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ICS1531 датащи(PDF) 51 Page - Integrated Circuit Systems |
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ICS1531 датащи(HTML) 51 Page - Integrated Circuit Systems |
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51 / 76 page ![]() Chapter 6 Register Set ICS1531 Rev N 12/1/99 December, 1999 51 Copyright © 1999, Integrated Circuit Systems, Inc. All rights reserved. ICS1531 Data Sheet - Preliminary 6.5.39 Register 37h: PSEL The PSEL Register is used to program the general-purpose pins, PSEL1 through PSEL3. Table 6-38. PSEL Register Bit Bit Name Bit Definition Ac- cess Spec. Func. Re- set 37:7 ADCRCLK_Inv ADCRCLK Invert. This bit inverts the ADCRCLK signal. • 0 = Do not invert the ADCRCLK signal. • 1 = Invert the ADCRCLK signal (default). –– 1 37:6- 37:5 ADCRCLK_Del ADCRCLK Delay. These bits delay the ADCRCLK signal, relative to data, in 0.5-ns increments. • 0 = 0-ns delay of ADCRCLK • 1 = 0.5-ns delay of ADCRCLK • 2 = 1.0-ns delay of ADCRCLK (default) • 3 = 1.5-ns delay of ADCRCLK –– 2 37:4 Reserved Reserved. • See Section 6.1, “Reserved Bits”. • This bit must be programmed to ‘0’. –– 0 37:3 Cal_Access Calibration Access. Depending on the state of the VSS(TEST) pin (see Section 3.2.3.6, “Ground Pins”), this bit performs in either the Normal mode or the Test mode. • Normal mode. When the ICS1531 is in Normal mode and this bit = – 0, Calibration Regs cannot be accessed. – 1, Calibration Regs 38h to 3Ch can be accessed. • Test mode. – When the ICS1531 is in Test mode, Calibration Regs 38h to 3Ch can be accessed, regardless of the setting of Reg 37:3. – The Test mode is intended for use only by ICS. R/W – 0 37:2 PSEL3 Programmable Select 3. This bit is used to program general-purpose pin PSEL3. R/W – 0 37:1 PSEL2 Programmable Select 2. This bit is used to program general-purpose pin PSEL2. R/W – 0 37:0 PSEL1 Programmable Select 1. This bit is used to program general-purpose pin PSEL1. R/W – 0 |
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