3

www.pericom.com

PS9059A

07/28/12

PI3VDP411LSA

Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter)

Pin Description

Pin

Name

I/O Type Descriptions

1, 5, 12, 18, 24,

27, 31, 36, 37, 43 GND

POWER

GROUND

2, 11, 15, 21, 26,

33, 40, 46

POWER

POWER, 3.3V ±10%

3, 4

SR0, SR1

I

Slew Rate Control. Acceptable connections to SRx pin are: resistor to 3.3V or

short to GND. (internal 200KΩ pull-LOW)

6, 35

NC

O

No Connect

7

HPD_SOURCE

O

HPD_SOURCE: 0V to 3.3V (nominal) output signal. HPD_Sink input can be as

high as 5V and then HPD_Source will output no higher than 3.3V.

8

SDA_SOURCE

I/O

3.3V DDC Data I/O. Pulled up by external termination to 3.3V.

DDC_EN

DDCBSEL DDC level shifter type

Low

X

DISABLE DDC level shifter

High

Low

Passive level shifter ENABLE

Connected to SDA_SINK through voltage-

limiting integrated NMOS passgate

High

High

Active level shifter ENABLE

Connected to SDA_SINK through bi-direc-

tion buffer

9

SCL_SOURCE

I/O

3.3V DDC Data I/O. Pulled up by external termination to 3.3V.

DDC_EN

DDCBSEL DDC level shifter type

Low

X

DISABLE DDC level shifter

High

Low

Passive level shifter ENABLE

Connected to SCL_SINK through voltage-

limiting integrated NMOS passgate

High

High

Active level shifter ENABLE

Connected to SCL_SINK through bi-direction

buffer

10

DDCBSEL

I

Active DDC level shifter enable pin. (internal 200KΩ pull-LOW)

DDCBSEL

DDC path

Low (0V)

Passive DDC level shifter

High (3.3V)

Active DDC level shifter

13

OUT_D4+

O

HDMI 1.3 compliant TMDS output. OUT_D4+ makes a differential output

signal with OUT_D4-.

14

OUT_D4-

O

HDMI 1.3 compliant TMDS output. OUT_D4- makes a differential output

signal with OUT_D4+

16

OUT_D3+

O

HDMI 1.3 compliant TMDS output. OUT_D3+ makes a differential output

signal with OUT_D3-.

17

OUT_D3-

O

HDMI 1.3 compliant TMDS output. OUT_D3- makes a differential output

signal with OUT_D3+

12-0236