5

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PS9059A

07/28/12

PI3VDP411LSA

Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter)

Pin

Name

I/O Type Descriptions

34

SQSEL

I

TMDS clock detection setting

Pulled up by external termination to 3.3V or short to GND.

SQSEL Clock Monitor Pin

0

Device monitor HDMI pixel clock on Pin38/39

(Channel IN_D1±)

1

Device monitor DVI pixel clock on Pin 47/48

(Channel IN_D4±)

38

IN_D1-

I

Low-swing diff input from DP Tx outputs. IN_D1- makes a differential pair

with IN_D1+.

39

IN_D1+

I

Low-swing diff input from DP Tx outputs. IN_D1+ makes a differential pair

with IN_D1-.

41

IN_D2-

I

Low-swing diff input from DP Tx outputs. IN_D2- makes a differential pair

with IN_D2+.

42

IN_D2+

I

Low-swing diff input from DP Tx outputs. IN_D2+ makes a differential pair

with IN_D2-.

44

IN_D3-

I

Low-swing diff input from DP Tx outputs. IN_D3- makes a differential pair

with IN_D3+.

45

IN_D3+

I

Low-swing diff input from DP Tx outputs. IN_D3+ makes a differential pair

with IN_D3-.

47

IN_D4-

I

Low-swing diff input from DP Tx outputs. IN_D4- makes a differential pair

with IN_D4+.

48

IN_D4+

I

Low-swing diff input from DP Tx outputs. IN_D4+ makes a differential pair

with IN_D4-.

12-0236