4

www.pericom.com

PS9059A

07/28/12

PI3VDP411LSA

Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter)

Pin

Name

I/O Type Descriptions

19

OUT_D2+

O

HDMI 1.3 compliant TMDS output. OUT_D2+ makes a differential output

signal with OUT_D2-.

20

OUT_D2-

O

HDMI 1.3 compliant TMDS output. OUT_D2- makes a differential output

signal with OUT_D2+

22

OUT_D1+

O

HDMI 1.3 compliant TMDS output. OUT_D1+ makes a differential output

signal with OUT_D1-.

23

OUT_D1-

O

HDMI 1.3 compliant TMDS output. OUT_D1- makes a differential output

signal with OUT_D1+

25

OE#

I

Enable for level shifter path.

OE#

IN_D Termination

OUT_D Outputs

1

> 100KΩ

High-Z

0

50Ω

Active

28

SCL_SINK

I/O

5V DDC Clock I/O. Pulled up by external termination to 5V.

DDC_EN

DDCBSEL DDC level shifter type

Low

X

DISABLE DDC level shifter

High

Low

Passive level shifter ENABLE

Connected to SCL_SOURCE through voltage-

limiting integrated NMOS passgate

High

High

Active level shifter ENABLE

Connected to SCL_SOURCE through bi-

direction buffer

29

SDA_SINK

I/O

5V DDC Data I/O. Pulled up by external termination to 5V.

DDC_EN

DDCBSEL DDC level shifter type

Low

X

DISABLE DDC level shifter

High

Low

Passive level shifter ENABLE

Connected to SDA_SOURCE through voltage-

limiting integrated NMOS passgate

High

High

Active level shifter ENABLE

Connected to SDA_SOURCE through bi-

direction buffer

30

HPD_SINK

I

Low Frequency, 0V to 5V (nominal) input signal. This signal comes from the

TMDS connector. Voltage High indicates “plugged” state; voltage low indicated

“unplugged”. HPD_SINK is pulled down by an integrated 100K ohm pull-down

resistor.

32

DDC_EN

I

Enables DDC level shifter path

DDC_EN

Passgate

Low (0V)

Disable

High (3.3V)

Enable

12-0236