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LP3972 датащи(PDF) 49 Page - Texas Instruments

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номер детали LP3972
подробное описание детали  Power Management Unit for Advanced Application Processors
PDF  59 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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LP3972 датащи(HTML) 49 Page - Texas Instruments

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0
0.5
1.0
1.5
LOAD CURRENT (A)
3.0
3.5
4.0
4.5
5.0
5.5
VPP-RMS =
VPP-C
2 + V
PP-ESR
2
LP3972
www.ti.com
SNVS468J – SEPTEMBER 2006 – REVISED AUGUST 2011
Voltage peak-to-peak ripple due to ESR can be expressed as follows
VPP-ESR = (2 * IRIPPLE) * RESR
(5)
Because these two components are out of phase the RMS value can be used to get an approximate value of
peak-to-peak ripple.
Voltage peak-to-peak ripple, root mean squared can be expressed as follows
(6)
Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series
resistance of the output capacitor (RESR).
The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations
is at the switching frequency of the part.
Table 2. Suggested Capacitor and Their Suppliers
Case Size
Model
Type
Vendor
Voltage
Inch (mm)
GRM21BR60J106K
Ceramic, X5R
Murata
6.3V
0805 (2012)
JMK212BJ106K
Ceramic, X5R
Taiyo-Yuden
6.3V
0805 (2012)
C2012X5R0J106K
Ceramic, X5R
TDK
6.3V
0805 (2012)
Buck Output Ripple Management
If VIN and ILOAD increase, the output ripple associated with the Buck Regulators also increases. Figure 32 shows
the safe operating area. To ensure operation in the area of concern it is recommended that the system designer
circumvents the output ripple issues to install Schottky diodes on the Buck(s) that are expected to perform under
these extreme corner conditions.
(Schottky diodes are recommended to reduce the output ripple, if system requirements include this shaded area
of operation. VIN > 1.5V and ILOAD > 1.24)
Figure 32.
Board Layout Considerations
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss
in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or
instability.
Good layout for the converters can be implemented by following a few simple design rules.
1. Place the converters, inductor and filter capacitors close together and make the traces short. The traces
between these components carry relatively high switching currents and act as antennas. Following this rule
Copyright © 2006–2011, Texas Instruments Incorporated
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