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LP3972 датащи(PDF) 34 Page - Texas Instruments |
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LP3972 датащи(HTML) 34 Page - Texas Instruments |
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34 / 59 page ![]() LP3972 SNVS468J – SEPTEMBER 2006 – REVISED AUGUST 2011 www.ti.com Bit Access Name Description 6 R B3_OK Buck3 Supply Output Voltage Status 0 - (Buck3) output voltage < 90% Default value 1 - (Buck3) output voltage > 90% Default value 5 R B2_OK Buck2 Supply Output Voltage Status 0 - (Buck2) output voltage < 90% Default value 1 - (Buck2) output voltage > 90% Default value 4 R LDO1_OK LDO1 Output Voltage Status 0 - (VCC_LDO1) output voltage < 90% of selected value 1 - (VCC_LDO1) output voltage > 90% of selected value 3 — — Reserved 2:0 R BCT Binary coded thermal management flag status register Temperature Data Code Ascending °C 000 40 001 60 010 80 011 100 100 120 101 140 110 160 111 Reserved LOGIC OUTPUT ENABLE REGISTER (LOER) 8H’84 Bit 7 6(1) 5(1) 4(1) 3(1) 2(1) 1(1) 0(1) Designation Reserved B3ENC B2ENC B1ENC L5EC L4EC L3EC L2EC Reset Value 0 1 1 0 0 1 1 1 (1) One time factory programmable EPROM registers for default values LOGIC OUTPUT ENABLE REGISTER (LOER) DEFINITIONS 8H’84 Bit Access Name Description 7 — — Reserved 6 R/W B3ENC Connects Buck3 enable to SYS_EN or PWR_EN Logic Control pin 0 - Buck3 enable connected to PWR_EN 1 - Buck3 enable connected to SYS_EN, Default 5 R/W B2ENC Connects Buck2 enable to SYS_EN or PWR_EN Logic Control pin 0 - Buck2 enable connected to PWR_EN 1 - Buck2 enable connected to SYS_EN, Default 4 R/W B1ENC Connects Buck1 enable to SYS_EN or PWR_EN Logic Control pin 0 - Buck1 enable connected to PWR_EN, Default 1 - Buck1 enable connected to SYS_EN 3 R/W L5EC Connects LDO5 enable to SYS_EN or PWR_EN Logic Control pin 0 - LDO5 enable connected to PWR_EN, Default 1 - LDO5 enable connected to SYS_EN 2 R/W L4EC Connects LDO4 enable to SYS_EN or PWR_EN Logic Control pin 0 - LDO4 enable connected to PWR_EN 1 - LDO4 enable connected to SYS_EN, Default 1 R/W L3EC Connects LDO3 enable to SYS_EN or PWR_EN Logic Control pin 0 - LDO3 enable connected to PWR_EN 1 - LDO3 enable connected to SYS_EN, Default 0 R/W L2EC Connects LDO2 enable to SYS_EN or PWR_EN Logic Control pin 0 - LDO2 enable connected to PWR_EN 1 - LDO2 enable connected to SYS_EN, Default 34 Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP3972 |
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