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LP3972 датащи(PDF) 39 Page - Texas Instruments

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номер детали LP3972
подробное описание детали  Power Management Unit for Advanced Application Processors
PDF  59 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

LP3972 датащи(HTML) 39 Page - Texas Instruments

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0
0
1
0
0
0
0
0
Register Address
Ack
VCC1 (8Z[20)
0
0
1
1
0
0
1
1
Data
Ack
Register Data (00110011)
0
0
1
0
1
0
1
0
Register Address
Ack
SDTV2 (8Z[2A)
0
0
0
0
1
1
1
1
Data
Ack
Register Data (00001111)
0
0
1
0
0
1
0
0
Register Address
Ack
ADTV2 (8Z[24)
0
0
0
1
0
1
1
1
Data
Ack
Register Data (00010111)
0
1
1
0
1
0
0
0
Device ID
Ack
Stop
Start
W
LP3972
www.ti.com
SNVS468J – SEPTEMBER 2006 – REVISED AUGUST 2011
Example 2) Voltage change Sequence
PMIC Register
PMIC Register
Register Data
Description
Address
Name
8h’24
ADTV2
00010111
Sets the VCC_APPS target voltage 2 to 1.3 V
8h’2A
SDTV2
00001111
Sets the VCC_SRAM target voltage 2 to 1.1 V
8h’20
VCC1
00110011
Enable VCC_SRAM and VCC_APPS to change to their programmed target
values.
I2C DATA EXCHANGE BETWEEN MASTER AND SLAVE DEVICE
Figure 27.
LP3972 Controls
DIGITAL INTERFACE CONTROL SIGNALS
Signal
Definition
Active State
Signal Direction
SYS_EN
High Voltage Power Enable
High
Input
PWR_EN
Low Voltage Power Enable
High
Input
SCL
Serial Bus Clock Line
Clock
Input
SDA
Serial Bus Data Line
Bidirectional
nRSTI
Forces an unconditional
Low
Input
hardware reset
nRSTO
Forces an unconditional
Low
Output
hardware reset
nBATT_FLT
Main Battery removed or
Low
Output
discharged indicator
PWR_ON
Wakeup Input to CPU
High
Input
nTEST_JIG
Wakeup Input to CPU
Low
Input
SPARE
Wakeup Input to CPU
High/Low
Input
EXT_WAKEUP
Wake-Up Output for application
High
Output
processor
GPIO1 / nCHG_EN
General Purpose I/O /External
—
Bidirectional /Input
Back-up Battery Charger enable
GPIO2
General Purpose I/O
—
Bidirectional
Copyright © 2006–2011, Texas Instruments Incorporated
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Product Folder Links: LP3972



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