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LP3972 датащи(PDF) 41 Page - Texas Instruments

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номер детали LP3972
подробное описание детали  Power Management Unit for Advanced Application Processors
PDF  59 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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LP3972 датащи(HTML) 41 Page - Texas Instruments

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PWR_ON
nTEST_JIG
SPARE
Internal Thermal Early Warning
10 ms
EXT_WAKEUP
EXT_WAKEUP
PWR_ON
nTEST_JIG
SPARE
OR
LP3972
www.ti.com
SNVS468J – SEPTEMBER 2006 – REVISED AUGUST 2011
Figure 28.
WAKEUP register bits
Reason for WAKEUP
WUP0
SPARE
WUP1
TEST_JIG
WUP2
PWR_ON short pulse
WUP3
PWR_ON long pulse
TSD_EW
TSD Early Warning
INTERNAL THERMAL SHUTDOWN PROCEDURE
Thermal shutdown is build to generate early warning (typ. 125°C) which triggers the EXT_WAKEUP for the
processor acknowledge. When a thermal shutdown triggers (typ. 160°C) the PMU will reset the system until the
device cools down.
BATTERY SWITCH AND BACK UP BATTERY CHARGER
When Back-Up battery is connected but the main battery has been removed or its supply voltage too low,
LP3972 uses Back-Up Battery for generating LDO_RTC voltage. When Main Battery is available the battery FET
switches over to the main battery for LDO_RTC voltage. When Main battery voltage is too low or removed
nBATT_FLT is asserted. If no back up battery exists, the battery switch to back up can be switched off by
nBU_BAT_EN bit. User can set the battery fault determination voltage and battery charger current via I2C
compatible interface. Enabling of back up battery charger can be done via serial interface (nBAT_CHG_EN) or
external charger enable pin (nCHG_EN). Pin 29 is set as external charger enable input by default.
GENERAL PURPOSE I/O FUNCTIONALITY (GPIO1 AND GPIO2)
LP3972 has 2 general purpose I/Os for system control. I2C compatible interface will be used for setting any of the
pins to input, output or hi-Z mode. Inputs value can be read via serial interface (GPIO1,2 bits). The pin 29
functionality needs to be set to GPIO by serial interface register bit nEXTCHGEN. (GPIO/CHG)
Controls
Port Function
Reg
batmonchg
GPIO<1>
GPIO<1>
Nextchgen_sel
bucen
GPIO1
Gpin 1
Function
X
X
1
0
Input = 0
0
Enabled
X
X
1
0
Input = 1
0
Not Enabled
1
0
1
X
X
0
X
X
X
1
X
Enabled
0
0
0
X
HiZ
1
0
0
X
Input (dig)->
Input
0
1
0
X
Output = 0
0
Copyright © 2006–2011, Texas Instruments Incorporated
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Product Folder Links: LP3972



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