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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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IO20PDB0V0 датащи(PDF) 151 Page - Microsemi Corporation |
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IO20PDB0V0 датащи(HTML) 151 Page - Microsemi Corporation |
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151 / 197 page  SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 37 63 TM1 TM1 64 CM1 CM1 65 ABPS3 ABPS3 66 ABPS2 ABPS2 67 ADC0 ADC0 68 ADC1 ADC1 69 ADC2 ADC2 70 ADC3 ADC3 71 VAREF0 VAREF0 72 GND33ADC0 GND33ADC0 73 VCC33ADC0 VCC33ADC0 74 GND33ADC0 GND33ADC0 75 VCC15ADC0 VCC15ADC0 76 GND15ADC0 GND15ADC0 77 GND15ADC1 GND15ADC1 78 VCC15ADC1 VCC15ADC1 79 GND33ADC1 GND33ADC1 80 VCC33ADC1 VCC33ADC1 81 GND33ADC1 GND33ADC1 82 VAREF1 VAREF1 83 ADC7 ADC7 84 ADC6 ADC6 85 ADC5 ADC5 86 ADC4 ADC4 87 ABPS6 ABPS6 88 ABPS7 ABPS7 89 CM3 CM3 90 TM3 TM3 91 GNDTM1 GNDTM1 92 TM2 TM2 93 CM2 CM2 Pin Number PQ208 A2F200 A2F500 Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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