IO20PDB0V0 datasheet(71/197 Pages) MICROSEMI

номер детали	IO20PDB0V0

подробное описание детали	SmartFusion Customizable System-on-Chip (cSoC)

PDF	197 Pages

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производитель	MICROSEMI [Microsemi Corporation]

домашняя страница	http://www.microsemi.com

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71 / 197 page

SmartFusion Customizable System-on-Chip (cSoC)

Re vi s i on 12

2 - 59

Global Resource Characteristics

A2F200 Clock Tree Topology

Clock delays are device-specific. Figure 2-27 is an example of a global tree used for clock routing. The

global tree presented in Figure 2-27 is driven by a CCC located on the west side of the A2F200 device. It

is used to drive all D-flip-flops in the device.

Global Tree Timing Characteristics

Global clock delays include the central rib delay, the spine delay, and the row delay. Delays do not

include I/O input buffer clock delays, as these are I/O standard–dependent, and the clock may be driven

and conditioned internally by the CCC module. For more details on clock conditioning capabilities, refer

to the "Clock Conditioning Circuits" section on page 2-63. Table 2-80 through Table 2-82 on page 2-61

present minimum and maximum global clock delays for the SmartFusion cSoCs. Minimum and maximum

delays are measured with minimum and maximum loading.

Figure 2-27 • Example of Global Tree Use in an A2F200 Device for Clock Routing

Central

Global Rib

VersaTile

Rows

Global Spine

CCC

IO20PDB0V0 датащи(PDF) 71 Page - Microsemi Corporation