IO20PDB0V0 datasheet(116/197 Pages) MICROSEMI

116 / 197 page

Pin Descriptions

5- 2

R ev isio n 1 2

VCC15A

Supply

Clean analog 1.5 V supply to the analog circuitry. Always power this pin.

VCC15ADC0

Supply

Analog 1.5 V supply to the first ADC. Always power this pin.

VCC15ADC1

Supply

Analog 1.5 V supply to the second ADC. Always power this pin.

VCC15ADC2

Supply

Analog 1.5 V supply to the third ADC. Always power this pin.

VCC33A

Supply

Clean 3.3 V analog supply to the analog circuitry. VCC33A is also used to feed the

1.5 V voltage regulator for designs that do not provide an external supply to VCC. Refer

to the Voltage Regulator (VR), Power Supply Monitor (PSM), and Power Modes section

in the SmartFusion Microcontroller Subsystem User’s Guide for more information.

VCC33ADC0

Supply

Analog 3.3 V supply to the first ADC. If unused, Microsemi recommends connecting this

pin to a 3.3 V supply

VCC33ADC1

Supply

Analog 3.3 V supply to the second ADC. If unused, Microsemi recommends connecting

this pin to a 3.3 V supply.1

VCC33ADC2

Supply

Analog 3.3 V supply to the third ADC. If unused, Microsemi recommends connecting

this pin to a 3.3 V supply.1

VCC33AP

Supply

Analog clean 3.3 V supply to the charge pump. To avoid high current draw, VCC33AP

should be powered up simultaneously with or after VCC33A. Can be pulled down if

unused.1

VCC33N

Supply

–3.3 V output from the voltage converter. A 2.2 µF capacitor must be connected from

this pin to GND. Analog charge pump capacitors are not needed if none of the analog

SCB features are used and none of the SDDs are used. In that case it should be left

unconnected.

VCC33SDD0

Supply

Analog 3.3 V supply to the first sigma-delta DAC

VCC33SDD1

Supply

Common analog 3.3 V supply to the second and third sigma-delta DACs

VCCENVM

Supply

Digital 1.5 V power supply to the embedded nonvolatile memory blocks. To avoid high

current draw, VCC should be powered up before or simultaneously with VCCENVM.

VCCESRAM

Supply

Digital 1.5 V power supply to the embedded SRAM blocks. Available only on the

208PQFP package. It should be connected to VCC (in other packages, it is internally

connected to VCC).

VCCFPGAIOB0

Supply

Digital supply to the FPGA fabric I/O bank 0 (north FPGA I/O bank) for the output

buffers and I/O logic.

Each bank can have a separate VCCFPGAIO connection. All I/Os in a bank will run off

the same VCCFPGAIO supply. VCCFPGAIO can be 1.5 V, 1.8 V, 2.5 V, or 3.3 V,

nominal voltage. Unused I/O banks should have their corresponding VCCFPGAIO pins

tied to GND.

VCCFPGAIOB1

Supply

Digital supply to the FPGA fabric I/O bank 1 (east FPGA I/O bank) for the output buffers

and I/O logic.

Each bank can have a separate VCCFPGAIO connection. All I/Os in a bank will run off

the same VCCFPGAIO supply. VCCFPGAIO can be 1.5 V, 1.8 V, 2.5 V, or 3.3 V,

nominal voltage. Unused I/O banks should have their corresponding VCCFPGAIO pins

tied to GND.

Name

Type

Description

Notes:

1. The following 3.3 V supplies should be connected together while following proper noise filtering practices: VCC33A,

VCC33ADCx, VCC33AP, VCC33SDDx, VCCMAINXTAL, and VCCLPXTAL.

2. The following 1.5 V supplies should be connected together while following proper noise filtering practices: VCC,

VCC15A, and VCC15ADCx.

3. For more details on VCCPLLx capacitor recommendations, refer to the application note AC359, SmartFusion cSoC

Board Design Guidelines, the "PLL Power Supply Decoupling Scheme" section.

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