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CS43L42 датащи(PDF) 34 Page - Cirrus Logic

номер детали CS43L42
подробное описание детали  Low Voltage,Stereo DAC With Headphone Amp
PDF  40 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43L42 датащи(HTML) 34 Page - Cirrus Logic

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CS43L42
34
DS481PP2
LR C K
SC L K
Le ft C ha n nel
Rig h t Cha n nel
SD A T A
+3 +2 +1 LSB
+5 +4
MSB -1 -2 -3 -4 -5
+3 +2 +1 LSB
+5 +4
MSB -1 -2 -3 -4
Internal SCLK Mode
External SCLK Mode
I2S, Up to 24-Bit data and INT SCLK = 64 Fs if
MCLK/LRCK = 512, 256 or 128
I2S, Up to 24-Bit data and INT SCLK = 48 Fs if
MCLK/LRCK = 384 or 192
I2S, up to 24-Bit Data
Data Valid on Rising Edge of SCLK
Figure 19. CS43L42 Control Port Mode - Serial Audio Format 0
Figure 20. CS43L42 Control Port Mode - Serial Audio Format 1
LR C K
SC L K
Left C h a n n e l
R igh t C h ann e l
SD A T A
+3 +2 +1 LSB
+5 +4
MSB -1 -2 -3 -4 -5
+3 +2 +1 LSB
+5 +4
MSB -1 -2 -3 -4
Internal SCLK Mode
External SCLK Mode
I2S, 16-Bit data and INT SCLK = 32 Fs if
MCLK/LRCK = 512, 256 or 128
I2S, Up to 24-Bit data and INT SCLK = 48 Fs if
MCLK/LRCK = 384 or 192
I2S, up to 24-Bit Data
Data Valid on Rising Edge of SCLK
Figure 21. CS43L42 Control Port Mode - Serial Audio Format 2
LR C K
SC L K
Left C h a n n e l
R igh t C h ann e l
SD A T A
+3 +2 +1 LS B
+5 +4
MSB -1 -2 -3 -4 -5
+3 +2 +1 LS B
+5 +4
MS B -1 -2 -3 -4
Internal SCLK Mode
External SCLK Mode
Left Justified, up to 24-Bit Data
INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
Left Justified, up to 24-Bit Data
Data Valid on Rising Edge of SCLK



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