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CS43L42 датащи(PDF) 28 Page - Cirrus Logic

номер детали CS43L42
подробное описание детали  Low Voltage,Stereo DAC With Headphone Amp
PDF  40 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43L42 датащи(HTML) 28 Page - Cirrus Logic

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CS43L42
28
DS481PP2
DIF1 and DIF0
(Stand-Alone Mode)
8 and 9
Digital Interface Format (Input) - The required relationship between the Left/Right clock,
serial clock and serial data is defined by the Digital Interface Format and the options are de-
tailed in Figures 26-29.
N.C.
10
No Connection - This pin has no internal connection to the device.
CP/SA
11
Mode Select (Input) - The Mode Select pin is used to select control port or stand-alone
mode. When high, the CS43L42 will operate in control port mode. When low, the CS43L42
will operate in stand-alone mode.
VQ_HP
12
Headphone Quiescent Voltage (Output) - Filter connection for internal headphone amp
quiescent reference voltage. A capacitor must be connected from VQ_HP to analog ground,
as shown in Figure 6. VQ_HP is not intended to supply external current. VQ_HP has a typ-
ical source impedance of 250 k
Ω and any current drawn from this pin will alter device per-
formance.
REF_GND
13
Reference Ground (Input) - Ground reference for the internal sampling circuits. Must be
connected to analog ground.
FILT+
14
Positive Voltage Reference (Output) - Positive reference for internal sampling circuits. An
external capacitor is required from FILT+ to analog ground, as shown in Figure 6. The rec-
ommended value will typically provide 60 dB of PSRR at 1 kHz and 40 dB of PSRR at 60 Hz.
FILT+ is not intended to supply external current. FILT+ has a typical source impedance of
250 k
Ω and any current drawn from this pin will alter device performance.
VQ_LINE
15
Line Out Quiescent Voltage (Output) - Filter connection for internal line amp quiescent ref-
erence voltage. A capacitor must be connected from VQ_LINE to analog ground, as shown
in Figure 6. VQ_LINE is not intended to supply external current. VQ_LINE has a typical
source impedance of 250 k
Ω and any current drawn from this pin will alter device perfor-
mance.
HP_A and HP_B
16 and 21
Headphone Outputs (Output) - The full scale analog headphone output level is specified in
the Analog Characteristics specifications table.
GND
17
Ground (Input) - Ground Reference. Should be connected to analog ground.
VA
18
Analog Power (Input) - Analog power supply. Typically 1.8 to 3.3 VDC.
VA_LINE
19
Line Amp Power (Input) - Line amplifier power supply. Typically 1.8 to 3.3 VDC.
Note:
If the line outputs are not used, connect VA_LINE to VA.
VA_HP
20
Headphone Amp Power (Input) - Headphone amplifier power supply. Typically 0.9 to
3.3 VDC.
AOUTA and AOUTB
22 and 23
Analog Outputs (Output) - The full scale analog line output level is specified in the Analog
Characteristics specifications table.
MUTEC
24
Mute Control (Output) - The Mute Control pin goes high during power-up initialization, re-
set, muting, power-down or if the master clock to left/right clock frequency ratio is incorrect.
This pin is intended to be used as a control for an external mute circuit on the line outputs
to prevent the clicks and pops that can occur in any single supply system. Use of Mute Con-
trol is not mandatory but recommended for designs requiring the absolute minimum in ex-
traneous clicks and pops.
DIF1
DIF0
DESCRIPTION
FORMAT
FIGURE
00
I2S, up to 24-bit data
026
01
Left Justified, up to 24-bit data
127
10
Right Justified, 24-bit Data
228
11
Right Justified, 16-bit Data
329
Table 12. Digital Interface Format - DIF1 and DIF0 (Stand-Alone Mode)



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