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CS43L42 датащи(PDF) 12 Page - Cirrus Logic

номер детали CS43L42
подробное описание детали  Low Voltage,Stereo DAC With Headphone Amp
PDF  40 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43L42 датащи(HTML) 12 Page - Cirrus Logic

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CS43L42
12
DS481PP2
SWITCHING CHARACTERISTICS - CONTROL PORT - TWO-WIRE MODE
(TA = 25° C; VL = 1.7 V - 3.6 V; Inputs: Logic 0 = GND, Logic 1 = VL, CL =30pF)
Notes: 13. The Two-Wire Mode is compatible with the I2C protocol.
14. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.
Parameter
Symbol
Min
Max
Unit
Two-Wire Mode (Note 13)
SCL Clock Frequency
fscl
-
100
kHz
RST Rising Edge to Start
tirs
500
-
ns
Bus Free Time Between Transmissions
tbuf
4.7
-
µs
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
µs
Clock Low time
tlow
4.7
-
µs
Clock High Time
thigh
4.0
-
µs
Setup Time for Repeated Start Condition
tsust
4.7
-
µs
SDA Hold Time from SCL Falling
(Note 14)
thdd
0-
µs
SDA Setup time to SCL Rising
tsud
250
-
ns
Rise Time of SCL
trc
-25
ns
Fall Time SCL
tfc
-25
ns
Rise Time of SDA
trd
1µs
Fall Time of SDA
tfd
300
ns
Setup Time for Stop Condition
tsusp
4.7
-
µs
t
buf
t
hdst
t
hdst
t
lo w
t
rc
t
fc
t
hdd
t
high
t
sud
t sust
t susp
Sto p
S t a r t
St a r t
Sto p
Re p e a t e d
SD A
SC L
t
irs
RST
t
rd
t
fd
Figure 4. Control Port Timing - Two-Wire Mode



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