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S29GL01GS датащи(PDF) 38 Page - SPANSION |
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S29GL01GS датащи(HTML) 38 Page - SPANSION |
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38 / 106 page ![]() 38 GL-S MirrorBit® Family S29GL_128S_01GS_00_08 October 9, 2013 Da ta Sh e e t Program Suspended (bit 2), The current state bits indicate whether an EA is in process, suspended, or completed. The upper 8 bits (bits 15:8) are reserved. These have undefined High or Low value that can change from one status read to another. These bits should be treated as don't care and ignored by any software reading status. The Soft Reset Command will clear to 0 bits [5, 4, 1, 0] of the status register if Status Register bit 3 =0. It will not affect the current state bits. The Clear Status Register Command will clear to 0 the results related bits of the status register but will not affect the current state bits. Notes: 1. Bits 15 thru 8, and 0 are reserved for future use and may display as 0 or 1. These bits should be ignored (masked) when checking status. 2. Bit 7 is 1 when there is no Embedded Algorithm in progress in the device. 3. Bits 6 thru 1 are valid only if Bit 7 is 1. 4. All bits are put in their reset status by cold reset or warm reset. 5. Bits 5, 4, 3, and 1 are cleared to 0 by the Clear Status Register command or Reset command. 6. Upon issuing the Erase Suspend Command, the user must continue to read status until DRB becomes 1. 7. ESSB is cleared to 0 by the Erase Resume Command. 8. ESB reflects success or failure of the most recent erase operation. 9. PSB reflects success or failure of the most recent program operation. 10. During erase suspend, programming to the suspended sector, will cause program failure and set the Program status bit to 1. 11. Upon issuing the Program Suspend Command, the user must continue to read status until DRB becomes 1. 12. PSSB is cleared to 0 by the Program Resume Command. 13. SLSB indicates that a program or erase operation failed because the sector was locked. 14. SLSB reflects the status of the most recent program or erase operation. 5.4.2 Data Polling Status During an active Embedded Algorithm the EAC switches to the Data Polling ASO to display EA status to any read access. A single word of status information is aliased in all locations of the device address space. In the status word there are several bits to determine the status of an EA. These are referred to as DQ bits as they appear on the data bus during a read access while an EA is in progress. DQ bits 15 to 8, DQ4, and DQ0 are reserved and provide undefined data. Status monitoring software must mask the reserved bits and treat them as don't care. Table 5.3 on page 42 and the following subsections describe the functions of the remaining bits. Table 5.2 Status Register Bit # 15:8 76543210 Bit Description Reserved Device Ready Bit Erase Suspend Status Bit Erase Status Bit Program Status Bit Write Buffer Abort Status Bit Program Suspend Status Bit Sector Lock Status Bit Reserved Bit Name DRB ESSB ESB PSB WBASB PSSB SLSB Reset Status X 10000000 Busy Status Invalid 0 Invalid Invalid Invalid Invalid Invalid Invalid Invalid Ready Status X1 0=No Erase in Suspension 1=Erase in Suspension 0=Erase successful 1=Erase fail 0=Program successful 1=Program fail 0=Program not aborted 1=Program aborted during Write to Buffer command 0=No Program in suspension 1=Program in suspension 0=Sector not locked during operation 1=Sector locked error X |
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