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PIC12F635ESS датащи(PDF) 120 Page - Microchip Technology |
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PIC12F635ESS датащи(HTML) 120 Page - Microchip Technology |
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120 / 234 page ![]() PIC12F635/PIC16F636/639 DS41232D-page 118 © 2007 Microchip Technology Inc. 11.31.3.1 ANALOG-TO-DIGITAL DATA CONVERSION OF RSSI SIGNAL The AFE’s RSSI output is an analog current. It needs an external Analog-to-Digital (ADC) data conversion device for digitized output. The ADC data conversion can be accomplished by using a stand-alone external ADC device or by firmware utilizing MCU’s internal comparator along with a few external resistors and a capacitor. For slope ADC implementations, the external capacitor at the LFDATA pad needs to be discharged before data sampling. For this purpose, the internal pull-down MOSFET on the LFDATA pad can be utilized. The MOSFET can be turned on or off with bit RSSIFET<8> of the Configuration Register 2 (Register 11-3). When it is turned on, the internal MOSFET provides a discharge path for the external capacitor. This MOSFET option is valid only if RSSI output is selected and not controllable by users for demodulated or carrier clock output options. See separate application notes for various external ADC implementation methods for this device. 11.32 AFE Configuration 11.32.1 SPI COMMUNICATION The AFE SPI interface communication is used to read or write the AFE’s Configuration registers and to send command only messages. For the SPI interface, the device has three pads; CS, SCLK/ALERT, and LFDATA/RSSI/CCLK/SDIO. Figure 11-15, Figure 11-14, Figure 11-16 and Figure 11-17 shows examples of the SPI communication sequences. When the device powers up, these pins will be high-impedance inputs until firmware modifies them appropriately. The AFE pins connected to the MCU pins will be as follows. CS • Pin is permanently an input with an internal pull-up. SCLK/ALERT • Pin is an open collector output when CS is high. An internal pull-up resistor exists internal to the AFE to ensure no spurious SPI communication between powering and the MCU configuring its pins. This pin becomes the SPI clock input when CS is low. LFDATA/RSSI/CCLK/SDIO • Pin is a digital output (LFDATA) so long as CS is high. During SPI communication, the pin is the SPI data input (SDI) unless performing a register Read, where it will be the SPI data output (SDO). FIGURE 11-16: POWER-UP SEQUENCE CS SCLK/ALERT LFDATA/RSSI/ CCLK/SDIO ALERT LFDATA (output) (open collector output) |
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