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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC12F635ESS датащи(PDF) 25 Page - Microchip Technology |
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PIC12F635ESS датащи(HTML) 25 Page - Microchip Technology |
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25 / 234 page  © 2007 Microchip Technology Inc. DS41232D-page 23 PIC12F635/PIC16F636/639 TABLE 2-3: PIC16F636/639 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR/BOR/ WUR Page Bank 0 00h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 32,137 01h TMR0 Timer0 Module Register xxxx xxxx 61,137 02h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 32,137 03h STATUS IRP RP1 RP0 TO PD ZDC C 0001 1xxx 26,137 04h FSR Indirect Data Memory Address Pointer xxxx xxxx 32,137 05h PORTA — — RA5 RA4 RA3 RA2 RA1 RA0 --xx xx00 48,137 06h — Unimplemented — — 07h PORTC — — RC5 RC4 RC3 RC2 RC1 RC0 --xx xx00 57,137 08h — Unimplemented — — 09h — Unimplemented — — 0Ah PCLATH — — — Write Buffer for upper 5 bits of Program Counter ---0 0000 32,137 0Bh INTCON GIE PEIE T0IE INTE RAIE T0IF INTF RAIF(2) 0000 000x 28,137 0Ch PIR1 EEIF LVDIF CRIF C2IF C1IF OSFIF —TMR1IF 0000 00-0 30,137 0Dh — Unimplemented — — 0Eh TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 xxxx xxxx 64,137 0Fh TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 xxxx xxxx 64,137 10h T1CON T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 68,137 11h — Unimplemented — — 12h — Unimplemented — — 13h — Unimplemented — — 14h — Unimplemented — — 15h — Unimplemented — — 16h — Unimplemented — — 17h — Unimplemented — — 18h WDTCON — — — WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN ---0 1000 144,137 19h CMCON0 C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 0000 0000 79,137 1Ah CMCON1 — — — — — — T1GSS C2SYNC ---- --10 82,137 1Bh — Unimplemented — — 1Ch — Unimplemented — — 1Dh — Unimplemented — — 1Eh — Unimplemented — — 1Fh — Unimplemented — — Legend: – = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented Note 1: Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation. 2: MCLR and WDT Reset do not affect the previous value data latch. The RAIF bit will be cleared upon Reset but will set again if the mismatch exists. |
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