TAS5706APAPR datasheet(8/71 Pages) TI1

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ABSOLUTE MAXIMUM RATINGS

TAS5706A

TAS5706B

SLOS606D – MARCH 2009 – REVISED SEPTEMBER 2009............................................................................................................................................. www.ti.com

PIN FUNCTIONS (continued)

TYPE

5-V

TERMINATION

DESCRIPTION

(1)

TOLERANT

(2)

NAME

NO.

Reset, active-low. A system reset is generated by applying a logic low

to this terminal. RESET is an asynchronous control signal that

restores the DAP to its default conditions, sets the VALID outputs low,

RESET

5-V

Pullup

and places the PWM in the hard-mute state (stops switching). Master

volume is immediately set to full attenuation. Upon the release of

RESET, if PDN is high, the system performs a 4- to 5-ms device

initialization and sets the volume at mute.

SCL

5-V

I2C serial control clock input

Serial audio data clock (shift clock). SCLK is the serial audio port input

SCLK

5-V

data bit clock.

SDA

DIO

5-V

I2C serial control data interface input/output

Serial audio data-1 input is one of the serial data input ports. SDIN1

SDIN1

5-V

supports three discrete (stereo) data formats.

Serial audio data-2 input is one of the serial data input ports. SDIN2

SDIN2

5-V

supports three discrete (stereo) data formats.

STEST

Test terminal. Connect directly to GND.

SUB_PWM–

Subwoofer negative PWM output

SUB_PWM+

Subwoofer positive PWM output

TEST2

Test terminal. Connect directly to DVDD.

Output indicating validity of ALL PWM channels, active-high. This

VALID

terminal is connected to an external power stage. If no external power

stage is used, leave this terminal floating.

Internally generated voltage supply for channels A and B gate drive.

VCLAMP_AB

Not to be used as a supply or connected to any component other than

the decoupling capacitor

Internally generated voltage supply for channels C and D gate drive.

VCLAMP_CD

Not to be used as a supply or connected to any component other than

the decoupling capacitor

Internally regulated 1.8-V analog supply voltage. This terminal must

VR_ANA

not be used to power external devices.

Internally regulated 1.8-V digital supply voltage. This terminal must not

VR_DIG

be used to power external devices.

VREG_EN

Pulldown

Voltage regulator enable. Connect directly to GND.

over operating free-air temperature range (unless otherwise noted)

(1)

VALUE

UNIT

DVDD, AVDD

–0.3 to 3.6

Supply voltage

PVCC

-0.3 to 30

3.3-V digital input

–0.5 to DVDD + 0.5

Input voltage

5-V tolerant(2) digital input

–0.5 to DVDD + 2.5

Input clamp current, IIK (VI < 0 or VI > 1.8 V

±20

Output clamp current, IOK (VO < 0 or VO > 1.8 V

±20

Operating free-air temperature

0 to 85

°C

Operating junction temperature range

0 to 150

°C

Storage temperature range, Tstg

–40 to 125

°C

(1)

Stresses beyond those listed under absolute ratings may cause permanent damage to the device. These are stress ratings only and

functional operation of the device at these or any other conditions beyond those indicated under recommended operation conditions are

not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability.

(2)

5-V tolerant inputs are PDN, RESET, MUTE, SCLK, LRCLK, MCLK, SDIN1, SDIN2, SDA, SCL, and HPSEL.

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TAS5706A is Not Recommended for New Designs

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