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LP3906 датащи(PDF) 25 Page - Texas Instruments

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номер детали LP3906
подробное описание детали  Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C ompatible
PDF  47 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

LP3906 датащи(HTML) 25 Page - Texas Instruments

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ack from slave
w ack
start
msb Chip Address lsb
msb Register Add lsb
msb
DATA
lsb
ack
ack stop
ack from slave
ack from slave
SCL
start
id = K¶60
w ack
register addr = K¶10
GDWD DGGU K¶6A
ack
ack stop
SDA
rs
msb Chip Address lsb
r
ack
repeated start
data from slave
ack from master
r
id = K¶60
ack
rs
.
SCL
SDA
start
id = K¶60
w ack
addr = K¶02
DGGUHVV K¶$$ GDWD
ack
ack
stop
ack from slave
w ack
start
msb Chip Address lsb
msb Register Add lsb
msb
DATA
lsb
ack
ack
stop
ack from slave
ack from slave
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LP3906
www.ti.com
SNVS456M – AUGUST 2006 – REVISED MAY 2013
w = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by either master or slave)
rs = repeated start
id = LP3906 chip address : 0x60
Figure 37. I2C Write Cycle
When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in
the Read Cycle waveform.
Figure 38. I2C Read Cycle
LP3906 Control Registers
Register Address
Register Name
Read/Write
Register Description
0x02
ICRA
R
Interrupt Status Register A
0x07
SCR1
R/W
System Control 1 Register
0x10
BKLDOEN
R/W
Buck and LDO Output Voltage Enable Register
0x11
BKLDOSR
R
Buck and LDO Output Voltage Status Register
0x20
VCCR
R/W
Voltage Change Control Register 1
0x23
B1TV1
R/W
Buck 1 Target Voltage 1 Register
0x24
B1TV2
R/W
Buck 1 Target Voltage 2 Register
0x25
B1RC
R/W
Buck 1 Ramp Control
0x29
B2TV1
R/W
Buck 2 Target Voltage 1 Register
0x2A
B2TV2
R/W
Buck 2 Target Voltage 2 Register
0x2B
B2RC
R/W
Buck 2 Ramp Control
0x38
BFCR
R/W
Buck Function Register
0x39
LDO1VCR
R/W
LDO1 Voltage control Registers
0x3A
LDO2VCR
R/W
LDO2 Voltage control Registers
Copyright © 2006–2013, Texas Instruments Incorporated
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