AM3703CUS datasheet(155/280 Pages) TI

155 / 280 page

AM3715, AM3703

www.ti.com

SPRS616F

– JUNE 2010 – REVISED AUGUST 2011

Depending on frequency, the PSRR is defined in Table 5-5.

Table 5-5. Video DAC

– Power Supply Rejection Ratio

Supply Noise

PSRR % FSR/V

Frequency

0 to 100 kHz

> 100 kHz

The rejection decreases 20 dB/dec.

Example: at 1 MHz the PSRR is 10% of FSR/V.

A graphic representation is shown in Figure 5-5.

Figure 5-5. Video DAC

– Power Supply Rejection Ratio

To ensure that the DAC SFDR specification is met, the PSRR values and the clock jitter requirements

translate to the following limits on vdda_dac (for the Video DAC).

The maximum peak-to-peak noise on vdda (ripple) is defined in Table 5-6.

Table 5-6. Video DAC

– Maximum Peak-to-Peak Noise on vdda_dac

Tone Frequency

Maximum Peak-to-Peak Noise on vdda_dac

0 to 100 kHz

< 30 mVPP

> 100 kHz

Decreases 20 dB/dec.

Example: at 1 MHz the maximum is 3 mVPP

The maximum noise spectral density (white noise) is defined in Table 5-7.

Table 5-7. Video DAC

– Maximum Noise Spectral Density

Supply Noise Bandwidth

Maximum Supply Noise Density

0 to 100 kHz

< 20 µV / √Hz

> 100 kHz

Decreases 20 dB/dec.

Example: at 1 MHz the maximum noise density is 2

µV / √Hz

Video DAC Specifications

155

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